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Open Access Issue
Progress of two-dimensional semiconductor transistors and integrated circuits
Journal of National University of Defense Technology 2026, 48(3): 162-181
Published: 01 June 2026
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Significance

The continuous scaling of transistor feature size has been the core driving force for integrated circuit development over the past half-century. However, as process nodes enter the sub-1 nm regime, silicon-based technology faces fundamental physical bottlenecks, including short-channel effects, mobility degradation, and interconnect delays. 2D (two-dimensional) semiconductors, particularly TMD (transition metal dichalcogenide) such as MoS2, have emerged as promising alternative channel materials due to their atomic-scale thickness, excellent electrostatic control, and immunity to short-channel effects. The IRDS(International roadmap for devices and systems) has listed 2D semiconductors as the leading candidate for future replacement channel materials since 2018, with industry leaders such as IMEC, TSMC, and Intel actively pursuing 2D semiconductor research and development roadmaps. By 2025, MoS2-based CPUs and CMOS circuits have entered preliminary pilot stages, marking the transition of this technology from laboratory research to industrial applications. This review systematically examines the full-chain progress of 2D semiconductors from material synthesis to system integration, covering multiple aspects including materials science, device physics, process integration, and circuit design. By synthesizing recent advances and identifying key challenges, it aims to provide a useful reference for researchers working at the interface of fundamental materials science and practical device engineering.

Progress

This review comprehensively summarizes the research progress of 2D semiconductors across four key dimensions:

Material Synthesis: The review details the evolution of wafer-scale synthesis techniques for 2D semiconductors, with MoS2 as the primary representative. It covers large-area film preparation strategies such as face-to-face precursor transport, modular precursor regulation systems, and 12-inch wafer growth. Regarding crystal domain orientation control, it systematically discusses thermal strategies including step-edge induction and surface symmetry reduction, as well as kinetic strategies involving interface reconstruction layers. The review also presents recent breakthroughs in multilayer film growth, including step-induced uniform nucleation, layer-by-layer epitaxy, and lattice diffusion-interface epitaxy methods that enable the growth of pure-phase rhombohedral (3R) TMD single crystals with up to 15,000 layers. Beyond MoS2, it highlights advances in the synthesis of WS2, WSe2, hBN, Bi2O2Se, and InSe wafers.

Core Process Modules: The review provides an in-depth analysis of contact engineering, gate dielectric integration, and device architecture evolution. For N-type contacts, it covers atomic layer bonding (~70 Ω·μm), edge contacts (~290 Ω·μm), semimetal contacts (Sb: 42 Ω·μm, Bi: 123 Ω·μm), and van der Waals transfer techniques. For P-type contacts, it summarizes bulk doping (Nb: WSe2), chemical doping (PtCl4: 230~320 Ω·μm), van der Waals heterojunction band engineering (41 Ω·μm), and interface intercalation (Se/Au/WSe2: 540 Ω·μm). The review also addresses CGP (contact gate pitch) scaling challenges, highlighting advances in composite metal stacks (CGP=60 nm) and single-crystalline Sb contacts (CGP < 40 nm). For gate dielectrics, it discusses high-κ van der Waals dielectrics, native oxides (Bi2SeO5, κ~22), and single-crystalline metal-oxide dielectrics (c-Al2O3) with interface trap densities as low as 8.4×109 cm-2eV-1. Device architecture innovations, including FinFETs, GAAFETs, MBCFETs, and CFETs based on 2D materials, are also systematically reviewed.

Integrated Circuits: The review traces the development trajectory of 2D semiconductor integrated circuits from early single-transistor demonstrations (2011) to recent RISC-V processors with 5,900 transistors (2025). It highlights key milestones including the first logic gates (2012), 1-bit microprocessors (2017), polarity-controllable transistors (2018), wafer-scale transistor arrays (2020), 1.28 GHz ring oscillators (2023), monolithic 3D integration (2024), and the first full-featured 2D flash chips (2025). The review also discusses emerging applications beyond von Neumann architectures, including in-sensor computing and neuromorphic devices.

Industrialization Pathway: The review analyzes the current challenges in industrialization, including the lack of dedicated equipment, standardized precursors, and design ecosystems. It proposes a three-tiered framework for application scenarios: substitution (ultra-scaled transistors, flexible electronics, ultra-low-power devices), complement (back-end-of-line transistors, in-sensor computing, emerging memories), and beyond (neuromorphic computing, quantum technologies).

Conclusions and Prospects

Two-dimensional semiconductor integrated circuits have evolved from single-device demonstrations to complex system validations and early industrialization exploration over the past decade. Significant breakthroughs have been achieved in single-crystal film preparation, contact resistance engineering, and gate-all-around device architectures, validating the scientific feasibility of 2D semiconductors as critical technological options for the post-Moore era. However, the path toward large-scale industrialization remains challenging, requiring coordinated efforts in material uniformity, device reliability, design ecosystem development, supply chain construction, and cost competitiveness.

The review concludes that 2D semiconductors are unlikely to simply replicate the substitution path of silicon technology but will reshape the semiconductor industry landscape through differentiated complementarity and paradigm innovation. In the near term, they will serve as functional extenders integrated with silicon systems through back-end-of-line integration and in-sensor computing. In the mid-term, with improved material quality and process maturity, they are expected to achieve substitutional breakthroughs in silicon-limited domains such as ultra-scaled transistors and flexible electronics. In the long term, their unique quantum properties may enable beyond-silicon innovations in neuromorphic computing and quantum technologies. Sustained fundamental research investment, open industrial ecosystem collaboration, and application-driven engineering development will be the core drivers for the success of this atomically thin materials revolution.

Communication Issue
Unipolar p-type monolayer WSe2 field-effect transistors with high current density and low contact resistance enabled by van der Waals contacts
Nano Research 2024, 17(11): 10162-10169
Published: 27 August 2024
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High-performance field-effect transistors (FETs) based on atomically thin two-dimensional (2D) semiconductors have demonstrated great promise in post-Moore integrated circuits. However, unipolar p-type 2D semiconductor transistors yet remain challenging and suffer from low saturation current density (less than 10 μA·μm–1) and high contact resistance (larger than 100 kΩ·μm), mainly limited by the Schottky barrier induced by the mismatch of the work-functions and the Fermi level pinning at the metal contact interfaces. Here, we overcome these two obstacles through van der Waals (vdW) integration of high work-function metal palladium (Pd) as the contacts onto monolayer WSe2 grown by chemical vapor deposition (CVD) method. We demonstrate unipolar p-type monolayer WSe2 FETs with superior device performance: room temperature on-state current density exceeding 100 μA·μm–1, contact resistance of 12 kΩ·μm, on/off ratio over 107, and field-effect hole mobility of ~ 103 cm2·V–1·s–1. Electrical transport measurements reveal that the Fermi level pinning effect is completely effectively eliminated in monolayer WSe2 with vdW Pd contacts, leading to a Schottky barrier-free Ohmic contact at the metal-semiconductor junctions. Combining the advantages of large-scale vdW contact strategy and CVD growth, our results pave the way for wafer-scale fabrication of complementary-metal-oxide-semiconductor (CMOS) logic circuits based on atomically thin 2D semiconductors.

Open Access Paper Issue
Electrically-driven ultrafast out-of-equilibrium light emission from hot electrons in suspended graphene/hBN heterostructures
International Journal of Extreme Manufacturing 2024, 6(1): 015501
Published: 03 October 2023
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Nanoscale light sources with high speed of electrical modulation and low energy consumption are key components for nanophotonics and optoelectronics. The record-high carrier mobility and ultrafast carrier dynamics of graphene make it promising as an atomically thin light emitter, which can be further integrated into arbitrary platforms by van der Waals forces. However, due to the zero bandgap, graphene is difficult to emit light through the interband recombination of carriers like conventional semiconductors. Here, we demonstrate ultrafast thermal light emitters based on suspended graphene/hexagonal boron nitride (Gr/hBN) heterostructures. Electrons in biased graphene are significantly heated up to 2800 K at modest electric fields, emitting bright photons from the near-infrared to the visible spectral range. By eliminating the heat dissipation channel of the substrate, the radiation efficiency of the suspended Gr/hBN device is about two orders of magnitude greater than that of graphene devices supported on SiO2 or hBN. We further demonstrate that hot electrons and low-energy acoustic phonons in graphene are weakly coupled to each other and are not in full thermal equilibrium. Direct cooling of high-temperature hot electrons to low-temperature acoustic phonons is enabled by the significant near-field heat transfer at the highly localized Gr/hBN interface, resulting in ultrafast thermal emission with up to 1 GHz bandwidth under electrical excitation. It is found that suspending the Gr/hBN heterostructures on the SiO2 trenches significantly modifies the light emission due to the formation of the optical cavity and showed a~440% enhancement in intensity at the peak wavelength of 940 nm compared to the black-body thermal radiation. The demonstration of electrically driven ultrafast light emission from suspended Gr/hBN heterostructures sheds the light on applications of graphene heterostructures in photonic integrated circuits, such as broadband light sources and ultrafast thermo-optic phase modulators.

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