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Accelerated fault injection algorithm for SRAM-based FPGA using whole frame upset
Journal of National University of Defense Technology 2023, 45(5): 207-211
Published: 28 October 2023
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UR-SB (unrecoverable-sensitive bits), which cannot be corrected by regular refresh, will cause long-term interruption of on-orbit service of satellite load. Thus, the impact of UR-SB needs to be evaluated and improved deeply by the fault injection tests. However, the proportion of UR-SB is extremely low. If the traditional bit-by-bit upset fault injection method is adopted, the fault injection tests would take too long time, and the efficiency is extremely low. A fault injection acceleration algorithm for static random access memory-based field programmable gate array based on whole frame upset was proposed, which can quickly filter out the configuration frames without UR-SB through whole frame upset fault injection. By taking dichotomy on the configuration frames with UR-SB, the precise positioning process of UR-SB can be speeded up effectively. Taking the commonly used XQR2V3000 device as an example, the simulation results indicate that the test efficiency can be improved by 207 times under the poor conditions, and the real data experimental results of the signal generation load by our group are increased by 949 times. These results demonstrate the validity of the acceleration algorithm proposed in this article.

Open Access Issue
BRAM anti-irradiation design method for satellite payloads using time-sharing refreshing and location constraint
Journal of National University of Defense Technology 2023, 45(5): 231-236
Published: 28 October 2023
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In order to solve the problem of lightweight and high-reliability anti-irradiation hardening for BRAM(block random access memory) in static random access memory-based field programmable gate array under the strict limitation of space-borne resources, BRAM anti-irradiation hardening design method based on time-sharing refreshing and location constraint was proposed. The time-sharing refreshing of the BRAM was realized through monitoring time slot of algorithm execution, and location constraint was added to effectively reduce the probability of simultaneous anomalies of two modules under the design of triple modular redundancy, effectively improving the reliability of BRAM radiation resistance with less resource consumption. The results of heavy ion acceleration test show that after adopting the time-sharing refreshing and location constraint hardening methods, the single event function interruption cross section of a certain type of satellite payload in our laboratory has decreased by about 81.63%. The BRAM anomaly on navigation satellites has been reduced from 3 stars, which occurred 3 times in 2 years, to 25 stars that have not occurred in 2 years, and the reliability of radiation resistance has been greatly improved.

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