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Open Access Paper Issue
Tailoring the number of lines for IGO-channel 2T0C DRAM comparable to conventional 2-line operation 1T1C structure for highly scaled cell volume
International Journal of Extreme Manufacturing 2025, 7(5)
Published: 23 May 2025
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Capacitor-less 2T0C dynamic random-access memory (DRAM) employing oxide semiconductors (OSs) as a channel has great potential in the development of highly scaled three dimensional (3D)-structured devices. However, the use of OS and such device structures presents certain challenges, including the trade-off relationship between the field-effect mobility and stability of OSs. Conventional 4-line-based operation of the 2T0C enlarges the entire cell volume and complicates the peripheral circuit. Herein, we proposed an IGO (In-Ga-O) channel 2-line-based 2T0C cell design and operating sequences comparable to those of the conventional Si-channel 1 T1C DRAM. IGO was adopted to achieve high thermal stability above 800 ℃, and the process conditions were optimized to simultaneously obtain a high μFE of 90.7 cm2·V−1·s−1, positive Vth of 0.34 V, superior reliability, and uniformity. The proposed 2-line-based 2T0C DRAM cell successfully exhibited multi-bit operation, with the stored voltage varying from 0 V to 1 V at 0.1 V intervals. Furthermore, for stored voltage intervals of 0.1 V and 0.5 V, the refresh time was 10 s and 1000 s in multi-bit operation; these values were more than 150 and 15000 times longer than those of the conventional Si channel 1T1C DRAM, respectively. A monolithic stacked 2-line-based 2T0C DRAM was fabricated, and a multi-bit operation was confirmed.

Open Access Topical Review Issue
Atomic layer deposition for nanoscale oxide semiconductor thin film transistors: review and outlook
International Journal of Extreme Manufacturing 2023, 5(1): 012006
Published: 03 February 2023
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Since the first report of amorphous In–Ga–Zn–O based thin film transistors, interest in oxide semiconductors has grown. They offer high mobility, low off-current, low process temperature, and wide flexibility for compositions and processes. Unfortunately, depositing oxide semiconductors using conventional processes like physical vapor deposition leads to problematic issues, especially for high-resolution displays and highly integrated memory devices. Conventional approaches have limited process flexibility and poor conformality on structured surfaces. Atomic layer deposition (ALD) is an advanced technique which can provide conformal, thickness-controlled, and high-quality thin film deposition. Accordingly, studies on ALD based oxide semiconductors have dramatically increased recently. Even so, the relationships between the film properties of ALD-oxide semiconductors and the main variables associated with deposition are still poorly understood, as are many issues related to applications. In this review, to introduce ALD-oxide semiconductors, we provide: (a) a brief summary of the history and importance of ALD-based oxide semiconductors in industry, (b) a discussion of the benefits of ALD for oxide semiconductor deposition (in-situ composition control in vertical distribution/vertical structure engineering/chemical reaction and film properties/insulator and interface engineering), and (c) an explanation of the challenging issues of scaling oxide semiconductors and ALD for industrial applications. This review provides valuable perspectives for researchers who have interest in semiconductor materials and electronic device applications, and the reasons ALD is important to applications of oxide semiconductors.

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