Wide-range Body Bias Adjustment Circuit Design Based on 22 nm FDSOI RVT Process

Leakage power consumption is a key issue in integrated circuit applications, and body bias adjustment technology is one of the most commonly used power consumption adjustment technologies. The traditional body bias adjustment circuit has problems such as small bias voltage range and multiple power supply voltages, which not only increases the cost of the entire system, but also limits the optimization effect of body bias adjustment technology. Based on the 22 nm FDSOI (Fully Depleted Silicon on Insulator) RVT (Regular Voltage Threshold) process, a wide-range body bias adjustment circuit suitable for 22 nm FDSOI RVT digital integrated circuits is proposed. This circuit has a programmable (0 V, ±2 V) wide voltage output range, can achieve 50 mV bias voltage resolution, and does not require additional power input. The test circuit was implemented based on the 22 nm FDSOI process. The simulation results show that the body bias adjustment circuit proposed in this design can reduce the standby leakage of the test circuit by 34% to 92% and has a wide performance tracking range.