Due to its ability to significantly improve data rate, intelligent reflecting surface (IRS) is a potential crucial technique for the future generation wireless networks like six-generation (6G). In this paper, we focus on the analysis of degree of freedom (DoF) in IRS-aided multi-user multi-input multi-output (MIMO) network. Firstly, the DoF upper bound of IRS-aided single-user MIMO network, i.e., the achievable maximum DoF of such a system, is derived, and the corresponding results are extended to the case of IRS-aided multiuser MIMO by using the matrix rank inequalities. In particular, in serious rank-deficient, also called low-rank, like line-of-sight channel, the network DoF may double over no-IRS with the help of IRS. To verify the rate performance gain from augmented DoF, three closed-form beamforming methods, null-space projection plus maximize transmit power and maximize receive power (NSP-MTP-MRP), Schmidt orthogonalization plus (SO-MMSE) and two-layer leakage plus minimum mean square error (TLL-MMSE) are proposed to achieve the maximum DoF. Simulation results show that IRS does make a dramatic rate enhancement. For example, in a serious rank-deficient channel, also called low-rank, the sum-rate of the proposed TLL-MMSE aided by IRS is up to 2.54 times that of no IRS. This means that IRS may make a significant DoF improvement in such a channel.

In the report, aimed the problem that in the high-voltage and high-frequency applications, because of the increase of the pn junction area of the traditional trench MOSFET structures (CT-UMOS), 4H-SiC trench MOSFET structure affects the reverse recovery performance, a novel super junction 4H-SiC trench MOSFET structure (NSJ-UMOS) was designed. The structure introduced an NSJ super junction below the source, an SSJ structure composed of high concentration n+, low concentration n1+, and p1+regions was used to optimize the electric field distribution between the internal and gate oxide layers. TCAD simulation test was performed to verify the significant improvement of the performance of NSJ-UMOS. The results indicated that the reverse recovery time of NSJ-UMOS is shortened from 1.01 μs to 0.02 μs, the breakdown voltage is increased to 4030 V, the gate drain capacitance is reduced from 33.6 pF to 0.402 pF, the specific on resistance is reduced from 54.49 mΩ·cm² to 8.26 mΩ·cm², and the switching power consumption is reduced by 39.51%. The above improvements improved significantly the forward conduction performance, reverse recovery performance, and third quadrant performance of the device, which make it more advantageous in the high-voltage, high reliability, and high-frequency applications.