Compute eXpress Link (CXL) memory disaggregation technology has emerged as a prominent solution within the realm of memory decoupling, characterized by its low latency, supporting for memory semantics and hardware-level cache coherency. It aims to break through the limitations of traditional CPU-centric architectures, driving data centers towards a more flexible and composable architecture to accommodate the rapid development of advanced heterogeneous computing applications, such as high-performance computing and large-scale Artificial Intelligence (AI) models. This survey reviews the development of CXL memory disaggregation technology across three generations of CXL protocols, associated with the evolution of representative functionalities and key concepts in CXL specifications. Meanwhile, the fundamental performance and heterogeneous interleaving capabilities of CXL memory on the latest Intel Xeon platform are disclosed and analyzed in this paper based on practical tests. Furthermore, the paper conducts a comprehensive assessment of the current software and hardware ecosystem surrounding CXL memory disaggregation, delineating its advantageous application scenarios and the technological trends in adjacent fields, as informed by collective academic and industrial experiences. Last, this paper concludes the opportunities and challenges for CXL memory disaggregation technology catering to emerging applications like AI from a commercialization standpoint, denoting its potential in the design of next-generation intelligent computing centers.