Kesterite Cu₂ZnSn(S,Se)₄ (CZTSSe) presents a promising low-cost and sustainable photovoltaic material. However, its performance is critically hindered by uncontrollable complex crystallization during high-temperature selenization and the detrimental formation of a MoSe₂ back contact layer, which induces significant carrier recombination losses, imposing severe limitations on open-circuit voltage (V_OC) and fill factor (FF). Addressing the challenge of achieving high-quality CZTSSe absorbers and interfaces, this study introduces a novel thermal modulation strategy during selenization. By optimizing nucleation and crystallization through a controlled slow heating stage—distinct from conventional sustained high-temperature processes—this method yields more uniform CZTSSe grains, effectively suppresses runaway growth of the interfacial MoSe₂ layer, and inhibits absorber decomposition at the interface. Consequently, interface defect density is substantially reduced, leading to enhanced carrier transport properties. Devices fabricated using this method within the Cu²⁺–Sn²⁺–N,N-dimethylformamide (DMF) precursor system achieved a significant power conversion efficiency (PCE) increase from 8.02% to 11.65%, driven by a V_OC rise from 409 to 489 mV and a substantial FF enhancement from 54.34% to 63.63%. Furthermore, the method demonstrates excellent process compatibility, achieving PCEs of 13.72% and 13.81% in Cu⁺–Sn⁴⁺–DMF and Cu⁺–Sn⁴⁺–methoxyethanol (MOE) systems, respectively. This work underscores the crucial importance of the CZTSSe/Mo interface and provides new insights and pathways for fabricating high-quality absorbers and efficient kesterite solar cells.

Copper zinc tin sulfur selenide (Cu₂ZnSn(S,Se)₄, CZTSSe) thin-film solar cells have emerged as a promising photovoltaic technology due to their environmentally benign composition and abundant elemental constituents, though their current efficiency record remains constrained by substantial open-circuit voltage losses at the heterojunction interface. This review systematically examines the crucial role of heterojunction annealing processes in enhancing device performance, demonstrating that precisely optimized annealing parameters can effectively promote interfacial element redistribution, improve band alignment, and significantly suppress recombination losses. The low-temperature prolonged annealing approach has proven particularly effective in achieving superior interface passivation while maintaining structural integrity. Further interface optimization has been realized through innovative strategies including nanoscale interlayer engineering and cationic substitution approaches. By comprehensively analyzing recent advances in heterojunction annealing technology and highlighting promising research directions such as atomic-scale interface modification and computational optimization methods, this work provides valuable insights for overcoming the efficiency limitations of CZTSSe solar cells and advancing their commercial potential.