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Multiuser detection algorithm based on an efficient Laplacian scale mixture prior
Journal of Tsinghua University (Science and Technology) 2025, 65(11): 2067-2079
Published: 15 November 2025
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Objective

With the rapid evolution of fifth-generation (5G) mobile communication technologies, massive machine-type communication (mMTC) has become a pivotal application scenario in modern networks. This paradigm shift presents significant challenges in multiuser detection, particularly due to the exponential growth in user connections and heightened signal activity. Traditional orthogonal multiple access schemes, while ensuring minimal interuser interference, inherently limit the number of supported users by relying on orthogonal resource allocation, thereby failing to meet the scalability demands of mMTC. Consequently, grant-free nonorthogonal multiple access has emerged as a key enabler for Internet of Things communications, allowing nonorthogonal data superposition on limited resource blocks to enhance access capacity. However, existing sparse Bayesian learning (SBL) algorithms—although capable of achieving optimal sparse solutions—suffer from high computational complexity, primarily due to matrix inversion operations during expectation-maximization iterations. This complexity impedes real-time deployment in large-scale mMTC systems. To address this gap, this work proposes a novel SBL framework leveraging an efficient Laplace scale mixture (ELSM) prior, aiming to simultaneously enhance detection performance, reduce computational overhead, and adapt to dynamic multimeasurement scenarios.

Methods

This paper proposes an ELSM-SBL algorithm to overcome the limitations of conventional SBL methods. First, a hierarchical Bayesian model is constructed using a Laplace scale mixture prior, which leverages the sharp peaks and heavy-tailed properties of Laplace distributions to promote sparsity and robustness against outliers. To avoid computationally expensive matrix inversions, a surrogate function is introduced to approximate the Gaussian likelihood function. This approximation is optimized within a majorization-minimization (MM) framework, where a block coordinate descent (BCD) algorithm solves the resulting nonconvex optimization problem. For single measurement vector (SMV) scenarios, the ELSM-SBL-SMV algorithm optimizes hyperparameters via evidence maximization, while an MM framework with BCD resolves nonconvexity in the joint cost function. For multiple measurement vector (MMV) scenarios, the ELSM-SBL-MMV scheme exploits temporal correlations among active user sets across consecutive time slots by sharing sparsity-controlling hyperparameters, thereby enhancing reconstruction performance.

Results

Extensive simulations were conducted under mMTC settings with a total user count of K=108, subcarriers N=72, and active users M=12 using BPSK modulation and repeated over 1, 000 trials. For MMV scenarios, the number of measurement vectors was set to T=7. Compared with state-of-the-art SBL algorithms (e.g., GIG-SBL, BGIG-SBL, and LSM-SBL), the proposed ELSM-SBL-SMV algorithm can achieve a performance gain of about 2 dB, while the ELSM-SBL-MMV algorithm can achieve a gain of 3 dB. Meanwhile, the computational complexity of ELSM-SBL-SMV is O (K2), which is superior to existing SBL algorithms, demonstrating the superiority of the proposed algorithm in terms of performance and efficiency.

Conclusions

The ELSM-SBL algorithm approximates the Gaussian likelihood function of the model by introducing a surrogate function, avoiding matrix inversion and reducing algorithm complexity, thereby considerably improving multiuser detection in mMTC systems. The SMV and MMV extensions demonstrate robust performance gains of 2 and 3 dB, respectively, while achieving O (K2) complexity, which is optimal for large-scale deployments. The experimental results confirm the algorithm's superiority in terms of BER, AER, and runtime, making it a viable solution for 5G and beyond-5G networks. Future work will explore real-time hardware implementations and extensions to massive Multiple-Input Multiple-Output scenarios to further enhance applicability in dynamic wireless environments.

Issue
Parallel Pipeline Hardware Design of Intra Rate-Distortion Optimization Prediction Mode in HEVC
Journal of South China University of Technology (Natural Science Edition) 2023, 51(5): 95-103
Published: 25 May 2023
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In recent years, the resolution and frame rate of video have been continuously improved to meet people’ s increasing demand for video data. However, the compression encoding speed of real-time video sequence is often restricted by frame rate and resolution. The higher the frame rate and resolution are, the longer the encoding time will be. In order to achieve real-time compression encode for video sequences with higher resolution and frame rate, this paper designed a new parallel pipeline hardware architecture of intra rate-distortion optimization prediction mode, which supports intra prediction coding of up to 64×64 coding tree unit. Firstly, a parallel scheme with 9-way prediction mode was designed. Secondly, a pipeline hardware architecture was implemented based on a 4×4 block as the basic processing unit in a Z-shaped scanning order, and the prediction data of 32×32 prediction units were reused to replace the prediction data of 64×64 prediction units so as to reduce the amount of calculation. Lastly, a new Hadamard transform circuit was proposed based on this pipelined architecture for efficient pipelined processing. The experimental results show that: on the Altera Arria 10 series field programmable gate array, the 9-way mode parallel architecture only occupies 75 kb look up table and 55 kb register resources, the main frequency can reach 207 MHz, and it only takes 4096 clocks cycles to complete a 64×64 coding tree unit prediction and can support real-time encoding of 1080 P resolution 99 f/s full I-frame at most. Compared with the existing design scheme, the scheme designed in this paper can realize higher frame rate 1080 P real time video encoding with smaller circuit area.

Issue
Hardware Acceleration Design of HEVC Entropy Encoding Syntax Elements Based on FPGA
Journal of South China University of Technology (Natural Science Edition) 2023, 51(8): 110-117
Published: 25 August 2023
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High Efficiency Video Coding (HEVC/H. 265) is a widely used video coding standard in the international market. As the core encoding method of HEVC video encoding, Context Adaptive Binary Arithmetic Coding (CABAC) can improve the compression efficiency of arithmetic coding by establishing a more accurate probability model. Moreover, HEVC defines a larger variety of syntax elements and establishes more complex coding structures, further reducing information redundancy and thus reducing the bit rate. However, as the input data to CABAC, syntax elements’high complexity of preprocessing process increases the difficulty of hardware parallel processing. As a result, the throughput rate of entropy coding hardware is difficult to improve, which becomes one of the bottlenecks for HEVC encoder to achieve higher resolution real-time coding. To further speed up the entropy encoding modules, this study designed a high-throughput CABAC entropy encoding architecture based on FPGA. Within the architecture, the pre-header information coding, pre-initialization and coding unit (CU) are able to accelerate the generation of syntax elements, which is dedicated to CABAC. Due to the scheme of efficient residual coding and partial context index pipeline computing, the reduction of path latency and the improvement of operating frequency can be achieved as well as high throughput. In this study, the proposed design, which is synthesized by using a 90 nm standard cell library, occupies a total of 2.099×104 logic gates and operates in the frequency of 200 MHz. This paper also simulated the video sequence provided by HEVC official, and counted the time required for encoding a coding tree unit (CTU) under different quantitative parameters (QP). The experimental statistics show that the time of encoding a CTU was saved by 38.2% on average.

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