Depositing high-quality tunneling layers for two-dimensional (2D) floating gate transistors remains challenging, as it requires precise process control and parameter optimization. Herein, we fabricated a floating gate structure incorporating a high-quality hafnium oxide (HfO_x) tunneling layer achieved via ozone-induced oxidation of HfS₂ flakes. This process forms a nano-confined elemental oxygen layer at the tunneling layer/channel interface, which effectively suppresses leakage current. As a result, the WSe₂ floating gate transistor exhibits exceptional memory performance, including a high programming/erasing ratio, a long retention time (10⁵ s), multibit storage capacity, and reliable low temperature operation. Leveraging its programmable characteristics and robust performance, we demonstrated logic-in-memory operations with functional NOT, XNOR, and XOR gates. This rationally designed floating gate structure offers a promising approach for high-performance memory devices and logic-in-memory systems.

Due to the backscattered parasitic current from the barriers, the current gain of the widely used amplifier is far from ideal. In this work, we demonstrate a vertical Au/Al₂O₃/BP/MoS₂ tunneling hot-electron transfer amplifier with a hot-electron emitter-base junction and a p-n junction as the base-collector barrier. Fairly monoenergetic electrons traverse through the ultrathin Al₂O₃ dielectric via tunneling, which are accelerated and shifted to the collector region. The devices exhibit a high current on-off ratio of > 10⁵ and a high current density (J_C) of ~ 1,000 A/cm² at the same time. Notably, this work demonstrates a common-emitter current gain (β) value of 1,384 with a nanowatt power consumption at room temperature, which is a record high value among the all 2D based hot-electron transistors. Furthermore, the temperature dependent performance is investigated, and the β value of 1,613 is obtained at 150 K. Therefore, this work presents the potential of 2D based transistors for high-performance applications.