This paper describes an efficient implementation of the Sum-Product Algorithm (SPA) within a Low Density Parity Check (LDPC) code decoder, where a horizontal process correction term is used to improve the decoding performance of the Min-Sum algorithms. The correction term is implemented as a look-up table. The algorithm uses the correction term redundancy by means of a coordinate transformation to reduce the hardware complexity. Simulations and hardware tests indicate that the decoding performance is very good with the appropriate look-up table.
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Open Access
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Tsinghua Science and Technology 2013, 18 (1): 57-61
Published: 07 February 2013
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