Low-Density Parity-Check (LDPC) codes are powerful error correcting codes. LDPC decoders have been implemented as efficient error correction codes on dedicated VLSI hardware architectures in recent years. This paper describes two strategies to parallelize min-sum decoding of irregular LDPC codes. The first implements min-sum LDPC decoders on multicore platforms using OpenMP, while the other uses the Compute Unified Device Architecture (CUDA) to parallelize LDPC decoding on Graphics Processing Units (GPUs). Empirical studies on data with various scales show that the performance of these decoding processes is improved by these parallel strategies and the GPUs provide more efficient, fast implementation decoder.

This paper presents a decision directed frequency tracking scheme to improve the spectrum efficiency of Orthogonal Frequency Division Modulation (OFDM) transmission for frequency selective channels. OFDM divides a broadband channel into parallel narrowband subchannels with different channel characteristics. The subcarriers with lower attenuation are selected to do the decision directed based frequency tracking. A phase error detection method is needed to keep the hard decision working stable during tracking. The algorithm ensures that the carrier frequency offset could be solved from the detected phase error. The Mean Square Error (MSE) estimate and the loop bandwidth are also presented. Simulations illustrate that this scheme has better MSE and bit error rate performance than the traditional scheme. Furthermore, the pilots are saved in this scheme, which lead to improved spectrum efficiency.

Powerline communications (PLC) have drawn great interest in recent years. However, most PLC standards such as HomePlug AV use the cyclic-prefix OFDM (CP-OFDM) technology. This paper presents a broadband PLC system using low density parity check (LDPC) coded time domain synchronous OFDM (TDS-OFDM), whose spectrum efficiency is about 10% higher than that of CP-OFDM. With the same bandwidth and the ability to combat the time delay spread as HomePlug AV, this system can provide a maximum throughput of 199.7 Mbps physical layer data rate. Simulations over the measured practical powerline channel in Beijing, China, show that LDPC in the TDS-OFDM system dramatically improves the bit error rate performance, and verify the feasibility and performance of the TDS-OFDM technology for PLC systems.