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MoS2 dual-gate transistors with electrostatically doped contacts
Nano Research 2019, 12 (10): 2515-2519
Published: 01 August 2019
Downloads:28

Two-dimensional (2D) transition metal dichalcogenides (TMDs) such as molybdenum disulfide (MoS2) have been intensively investigated because of their exclusive physical properties for advanced electronics and optoelectronics. In the present work, we study the MoS2 transistor based on a novel tri-gate device architecture, with dual-gate (Dual-G) in the channel and the buried side-gate (Side-G) for the source/drain regions. All gates can be independently controlled without interference. For a MoS2 sheet with a thickness of 3.6 nm, the Schottky barrier (SB) and non-overlapped channel region can be effectively tuned by electrostatically doping the source/drain regions with Side-G. Thus, the extrinsic resistance can be effectively lowered, and a boost of the ON-state current can be achieved. Meanwhile, the channel control remains efficient under the Dual-G mode, with an ON-OFF current ratio of 3 × 107 and subthreshold swing of 83 mV/decade. The corresponding band diagram is also discussed to illustrate the device operation mechanism. This novel device structure opens up a new way toward fabrication of high-performance devices based on 2D-TMDs.

Research Article Issue
Large capacitance and fast polarization response of thin electrolyte dielectrics by spin coating for two-dimensional MoS2 devices
Nano Research 2018, 11 (7): 3739-3745
Published: 02 August 2018
Downloads:14

A spin-coating method was applied to obtain thinner and smoother PEO/LiClO4 polymer electrolyte films (EFs) with a lower level of crystallization than those obtained using a drop-casting method. When the applied frequency was as high as 10 kHz, the specific capacitance of such EFs with thicknesses of 1.5 μm was on the order of 1 μF·cm-2, a value larger than most of the previously reported results achieved from the same material. We then combined the thin EFs with two-dimensional (2D) materials to fabricate a MoS2 transistor with a top gate right above the channel, defined by a shadow-mask method, and an inverter device. This transistor showed excellent static characteristics and the inverter device showed excellent switching performance at 100 Hz, which indicates a fast polarization response of the thin EFs. Such device architecture is suitable for future low power and flexible electronics based on 2D materials.

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