AI Chat Paper
Note: Please note that the following content is generated by AMiner AI. SciOpen does not take any responsibility related to this content.
{{lang === 'zh_CN' ? '文章概述' : 'Summary'}}
{{lang === 'en_US' ? '中' : 'Eng'}}
Chat more with AI
PDF (1.8 MB)
Collect
Submit Manuscript AI Chat Paper
Show Outline
Outline
Show full outline
Hide outline
Outline
Show full outline
Hide outline
Publishing Language: Chinese | Open Access

A Design of High-efficiency Class E Power Amplifier Based on GaAs pHEMT Process

School of Integrated Circuits, Guangdong University of Technology, Guangzhou 510006, China
Show Author Information

Abstract

To address the urgent demand for high-efficiency, high-linearity, and broadband performance in S-band (2~4 GHz) radio frequency power amplifiers (PAs) for 5G Sub-6 GHz communication systems, an innovative design is proposed based on Gallium Arsenide Pseudomorphic High Electron Mobility Transistor (GaAs pHEMT) technology. Traditional silicon-based CMOS processes faced limitations in high-frequency scenarios due to breakdown voltage and parasitic effects, while Gallium Nitride (GaN) technology struggled with cost and integration challenges. The research focused on leveraging the potential of GaAs pHEMT technology to overcome efficiency, bandwidth, and harmonic suppression bottlenecks in S-band PAs and explored its integration in radio frequency front-end modules. The study employed a hybrid π-shaped harmonic matching network combined with reactance compensation technology. A single-stage topology integrated impedance transformation, harmonic suppression, and dynamic parasitic parameter compensation, resolving the limitations of traditional multi-stage LC networks (bandwidth <10%) and excessive area occupation. Off-chip discrete LC compensation modules were introduced to optimize high-frequency parasitic effects, and a two-stage cascaded architecture (driver stage and power stage) enhanced gain and power output. By precisely tuning gate (0.38 V/0.45 V) and drain (6 V) bias voltages, along with symmetric layout design and electromagnetic simulation optimization, nonlinear distortion and DC power consumption were significantly reduced. Experimental results demonstrate that the designed Class-E PA achieves a 15% fractional bandwidth in the 2.45~2.85 GHz range, with a second harmonic suppression ratio exceeding 20 dB (at 5.3 GHz) and optimized load impedance of 50 Ω. The measured power-added efficiency (PAE) reaches 56.4% at the center frequency of 2.65 GHz, with an output power of 26.2 dBm and a gain of 26 dB, outperforming existing solutions.

CLC number: TN722

References

【1】
【1】
 
 
Journal of Guangdong University of Technology
Pages 18-26

{{item.num}}

Comments on this article

Go to comment

< Back to all reports

Review Status: {{reviewData.commendedNum}} Commended , {{reviewData.revisionRequiredNum}} Revision Required , {{reviewData.notCommendedNum}} Not Commended Under Peer Review

Review Comment

Close
Close
Cite this article:
Liu K, Zeng L, Ye Z, et al. A Design of High-efficiency Class E Power Amplifier Based on GaAs pHEMT Process. Journal of Guangdong University of Technology, 2025, 42(6): 18-26. https://doi.org/10.12052/gdutxb.250094

1190

Views

11

Downloads

0

Crossref

Received: 09 May 2025
Accepted: 28 July 2025
Published: 01 November 2025
© 2025 Editorial Office of Journal of Guangdong University of Technology

This is an open access article under the CC BY-NC-ND license (https://creativecommons.org/licenses/by-nc-nd/4.0/).