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Whole-Chip ESD Protection Design for RF and AMS ICs

Xin WANG, Siqiang FAN†, Hui ZHAO, Lin LIN, Qiang FANG, He TANG, Albert WANG( )
Department of Electrical Engineering, University of California, Riverside, CA 92521, USA
Freescale Semiconductor, Inc., Irvine, CA 92618, USA
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Abstract

As integrated circuits (IC) technologies advance into very-deep-sub-micron (VDSM), electrostatic discharge (ESD) failure becomes one of the most devastating IC reliability problems and on-chip ESD protection design emerges as a major challenge to radio frequency (RF), analog, and mixed-signal (AMS) IC designs. This paper reviews key design aspects and recent advances in whole-chip ESD protection designs for RF/AMS IC applications in CMOS technologies.

Keywords

electrostatic discharge (ESD)ESD protectionradio frequency (RF)parasitic capacitance

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Tsinghua Science and Technology
Volume 15 Issue 3,
June 2010
Pages 265-274
DOI: 10.1016/S1007-0214(10)70060-2

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Cite this article:
WANG X, FAN S, ZHAO H, et al. Whole-Chip ESD Protection Design for RF and AMS ICs. Tsinghua Science and Technology, 2010, 15(3): 265-274. https://doi.org/10.1016/S1007-0214(10)70060-2

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Received: 29 March 2010
Revised: 08 May 2010
Published: 01 June 2010
© Tsinghua University Press 2010