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Research Article

Realization of flexible in-memory computing in a van der Waals ferroelectric heterostructure tri-gate transistor

Xinzhu Gao1,2, Quan Chen1,2, Qinggang Qin3, Liang Li3, Meizhuang Liu1,2, Derek Hao4, Junjie Li5,6( ), Jingbo Li7, Zhongchang Wang8, Zuxin Chen1,2( )
School of Semiconductor Science and Technology, South China Normal University, Foshan 528225, China
Guangdong Provincial Key Laboratory of Chip and Integration Technology, Guangzhou 510631, China
Institute of Solid State Physics Hefei Institutes of Physical Science, Chinese Academy of Sciences, Hefei 230601, China
School of Science, STEM College, RMIT University, Melbourne 3000, Australia
CAS Key Laboratory of Functional Materials and Devices for Special Environments, Xinjiang Technical Institute of Physics & Chemistry, Chinese Academy of Sciences, Urumqi 830011, China
Center of Materials Science and Optoelectronics Engineering, University of Chinese Academy of Sciences, Beijing 100049, China
College of Optical Science and Engineering, Zhejiang University, Hangzhou 310027, China
International Iberian Nanotechnology Laboratory (INL), Av. Mestre Jose Veiga s/n, Braga 4715-330, Portugal
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Graphical Abstract

To solve the bottleneck problem of computing energy efficiency of devices, the design of a two-dimensional ferroelectric van der Waals heterojunction device based on CuInP2S6 and WS2 is developed. By co-regulating the input signals across tri-gate, this device can achieve non-volatile storage, “AND” logic operations, and multi-valued states of data, while achieving a high current switching ratio of 107 and an ultra-low subthreshold swing of 53.9 mV/dec.

Abstract

Combining logical function and memory characteristics of transistors is an ideal strategy for enhancing computational efficiency of transistor devices. Here, we rationally design a tri-gate two-dimensional (2D) ferroelectric van der Waals heterostructures device based on copper indium thiophosphate (CuInP2S6) and few layers tungsten disulfide (WS2), and demonstrate its multi-functional applications in multi-valued state of data, non-volatile storage, and logic operation. By co-regulating the input signals across the tri-gate, we show that the device can switch functions flexibly at a low supply voltage of 6 V, giving rise to an ultra-high current switching ratio of 107 and a low subthreshold swing of 53.9 mV/dec. These findings offer perspectives in designing smart 2D devices with excellent functions based on ferroelectric van der Waals heterostructures.

Keywords

two-dimensional (2D) ferroelectricheterostructuretri-gatepolymorphic regulationin-memory computing

Electronic Supplementary Material

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Nano Research
Volume 17 Issue 3,
March 2024
Pages 1886-1892
DOI: 10.1007/s12274-023-5964-8
Cite this article:
Gao X, Chen Q, Qin Q, et al. Realization of flexible in-memory computing in a van der Waals ferroelectric heterostructure tri-gate transistor. Nano Research, 2024, 17(3): 1886-1892. https://doi.org/10.1007/s12274-023-5964-8
Topics:
Nano deviceSemiconductors

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Received: 16 May 2023
Revised: 16 June 2023
Accepted: 27 June 2023
Published: 01 August 2023
© Tsinghua University Press 2023
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