Journal Home > Volume 15 , Issue 2
Nano Research 2022, 15(2): 1603-1608 https://doi.org/10.1007/s12274-021-3708-1
Research Article | Issue | Published: 05 August 2021

Ultimate dielectric scaling of 2D transistors via van der Waals metal integration

Show Author's Information Weiqi Dang1,  Bei Zhao1,  Chang Liu3,  Xiangdong Yang1,  Lingan Kong2,  Zheyi Lu2,  Bo Li1,2,  Jia Li1,  Hongmei Zhang1,  Wanying Li2,  Shun Shi2,  Ziyue Qin1,  Lei Liao3,  Xidong Duan1( ),  Yuan Liu2 ( )
Hunan Key Laboratory of Two-Dimensional Materials and State Key Laboratory for Chemo/Biosensing and Chemometrics, College of Chemistry and Chemical Engineering Hunan UniversityChangsha 410082 China
Hunan Key Laboratory of Two-Dimensional Materials, Department of Applied Physics, School of Physics and Electronics Hunan UniversityChangsha 410082 China
Laboratory for Micro/Nano Optoelectronic Devices of Ministry of Education & Hunan Provincial Key Laboratory of Low-Dimensional Structural Physics and Devices, School of Physics and Electronics Hunan UniversityChangsha 410082 China
Keywords:
MoS2, van der Waals (vdW) integration, dielectric scaling, transfer gate, metal oxide semiconductor field effect transistor (MOSFET)
Topics:
Field effect transistors
Cite this article:
Dang W, Zhao B, Liu C, et al. Ultimate dielectric scaling of 2D transistors via van der Waals metal integration. Nano Research, 2022, 15(2): 1603-1608. https://doi.org/10.1007/s12274-021-3708-1
Download citation
EndNote(RIS)
BibTeX

631

Views

40

Downloads

Citations

17

Crossref

14

WoS

13

Scopus

0

CSCD

Abstract Full text Electronic supplementary material About this article

The two-dimensional transition metal dichalcogenides (TMDs) have attracted intense interest as an atomically thin semiconductor channel for the continued transistor scaling. However, with a dangling bond free surface, it has been a key challenge to reliably integrate high-quality gate dielectrics on TMDs. In particular, the atomic layer deposition of dielectrics on TMDs typically features highly non-uniform nucleation and produces a highly rough or porous dielectric film with rich pinholes that are prone to further damage during the gate integration process. Herein we report a van der Waals (vdW) integration route towards highly reliable gate metal integration on porous dielectrics. The physical lamination process employed by the vdW integration avoids the direct deposition of metal electrodes into porous dielectrics to ensure reliable gate integration and produce low gate leakage devices. The electrical measurements demonstrate the vdW integrated MoS2 top gate devices exhibit substantially reduced gate leakage current that is about 3–5 orders of magnitude smaller than that with deposited metal electrodes. Furthermore, we show the vdW integration process can be used to create high performance top-gated MoS2 transistors with ultrathin Al2O3 dielectrics down to 1 nm, representing the ultimate dielectric scaling for TMDs transistors. This study demonstrates that vdW integration can enable highly reliable gate integration on relatively low quality dielectrics on TMDs, and opens an interesting pathway to high-performance top-gate transistors using dangling bond free two-dimensional (2D) semiconductors.


menu
Abstract
Full text
Outline
Electronic supplementary material
About this article

Ultimate dielectric scaling of 2D transistors via van der Waals metal integration

Show Author's information Weiqi Dang1, Bei Zhao1, Chang Liu3, Xiangdong Yang1, Lingan Kong2, Zheyi Lu2, Bo Li1,2, Jia Li1, Hongmei Zhang1, Wanying Li2, Shun Shi2, Ziyue Qin1, Lei Liao3, Xidong Duan1( ), Yuan Liu2 ( )
Hunan Key Laboratory of Two-Dimensional Materials and State Key Laboratory for Chemo/Biosensing and Chemometrics, College of Chemistry and Chemical Engineering Hunan UniversityChangsha 410082 China
Hunan Key Laboratory of Two-Dimensional Materials, Department of Applied Physics, School of Physics and Electronics Hunan UniversityChangsha 410082 China
Laboratory for Micro/Nano Optoelectronic Devices of Ministry of Education & Hunan Provincial Key Laboratory of Low-Dimensional Structural Physics and Devices, School of Physics and Electronics Hunan UniversityChangsha 410082 China

Abstract

The two-dimensional transition metal dichalcogenides (TMDs) have attracted intense interest as an atomically thin semiconductor channel for the continued transistor scaling. However, with a dangling bond free surface, it has been a key challenge to reliably integrate high-quality gate dielectrics on TMDs. In particular, the atomic layer deposition of dielectrics on TMDs typically features highly non-uniform nucleation and produces a highly rough or porous dielectric film with rich pinholes that are prone to further damage during the gate integration process. Herein we report a van der Waals (vdW) integration route towards highly reliable gate metal integration on porous dielectrics. The physical lamination process employed by the vdW integration avoids the direct deposition of metal electrodes into porous dielectrics to ensure reliable gate integration and produce low gate leakage devices. The electrical measurements demonstrate the vdW integrated MoS2 top gate devices exhibit substantially reduced gate leakage current that is about 3–5 orders of magnitude smaller than that with deposited metal electrodes. Furthermore, we show the vdW integration process can be used to create high performance top-gated MoS2 transistors with ultrathin Al2O3 dielectrics down to 1 nm, representing the ultimate dielectric scaling for TMDs transistors. This study demonstrates that vdW integration can enable highly reliable gate integration on relatively low quality dielectrics on TMDs, and opens an interesting pathway to high-performance top-gate transistors using dangling bond free two-dimensional (2D) semiconductors.

Keywords: MoS2, van der Waals (vdW) integration, dielectric scaling, transfer gate, metal oxide semiconductor field effect transistor (MOSFET)

References(45)

1

Waldrop, M. M. The chips are down for Moore's law. Nature 2016, 530, 144–147.
DOI Google Scholar
2

Radisavljevic, B.; Radenovic, A.; Brivio, J.; Giacometti, V.; Kis, A. Single-layer MoS2 transistors. Nat. Nanotechnol. 2011, 6, 147–150.
DOI Google Scholar
3

Chhowalla, M.; Jena, D.; Zhang, H. Two-dimensional semiconductors for transistors. Nat. Rev. Mater. 2016, 1, 16052.
DOI Google Scholar
4

Choi, W.; Choudhary, N.; Han, G. H.; Park, J.; Akinwande, D.; Lee, Y. H. Recent development of two-dimensional transition metal dichalcogenides and their applications. Mater. Today 2017, 20, 116–130.
DOI Google Scholar
5

Cheng, Z. H.; Price, K.; Franklin, A. D. Contacting and gating 2-D nanomaterials. IEEE Trans. Electron Devices 2018, 65, 4073–4083.
DOI Google Scholar
6

Wang, J. L.; Yao, Q.; Huang, C. W.; Zou, X. M; Liao, L.; Chen, S. S; Fan, Z. Y.; Zhang, K.; Wu, W.; Xiao, X. H. et al. High mobility MoS2 transistor with low schottky barrier contact by using atomic thick h-BN as a tunneling layer. Adv. Mater. 2016, 28, 8302–8308.
DOI Google Scholar
7

Li, M. Y.; Su, S. K.; Wong, H. S. P.; Li, L. J. How 2D semiconductors could extend Moore's law. Nature 2019, 567, 169–170.
DOI Google Scholar
8

Cui, Y.; Xin, R.; Yu, Z. H.; Pan, Y. M.; Ong, Z. Y.; Wei, X. X.; Wang, J. Z.; Nan, H. Y.; Ni, Z. H.; Wu, Y. et al. High-performance monolayer WS2 field-effect transistors on high-κ dielectrics. Adv. Mater. 2015, 27, 5230–5234.
DOI Google Scholar
9

Song, X. J.; Xu, J. P.; Liu, L.; Deng, Y. H.; Lai, P. T.; Tang, W. M. Optimizing Al-doped ZrO2 as the gate dielectric for MoS2 field- effect transistors. Nanotechnology 2020, 31, 135206.
DOI Google Scholar
10

Goyal, N.; Parihar, N.; Jawa, H.; Mahapatra, S.; Lodha, S. Accurate threshold voltage reliability evaluation of thin Al2O3 top-gated dielectric black phosphorous FETs using ultrafast measurement pulses. ACS Appl. Mater. Interfaces 2019, 11, 23673–23680.
DOI Google Scholar
11

Cheng, L. X.; Lee, J.; Zhu, H.; Ravichandran, A. V.; Wang, Q. X; Lucero, A. T.; Kim, M. J.; Wallace, R. M.; Colombo, L.; Kim, J. Sub-10 nm tunable hybrid dielectric engineering on MoS2 for two-dimensional material-based devices. ACS Nano 2017, 11, 10243–10252.
DOI Google Scholar
12

Pan, Y.; Jia, K. P.; Huang, K. L.; Wu, Z. H.; Bai, G. B.; Yu, J. H.; Zhang, Z. Z.; Zhang, Q. Z.; Yin, H. X. Near-ideal subthreshold swing MoS2 back-gate transistors with an optimized ultrathin HfO2 dielectric layer. Nanotechnology 2019, 30, 095202.
DOI Google Scholar
13

Xia, P. K.; Feng, X. W.; Ng, R. J.; Wang, S. J; Chi, D. Z.; Li, C. Q.; He, Z. B.; Liu, X. K.; Ang, K. W. Impact and origin of interface states in MOS capacitor with monolayer MoS2 and HfO2 high-k dielectric. Sci. Rep. 2017, 7, 40669.
DOI Google Scholar
14

Kang, Y. S.; Kang, H. K.; Kim, D. K.; Jeong, K. S.; Baik, M.; An, Y.; Kim, H.; Song, J. D.; Cho, M. H. Structural and electrical properties of EOT HfO2 (< 1 nm) grown on InAs by atomic layer deposition and its thermal stability. ACS Appl. Mater. Interfaces 2016, 8, 7489–7498.
DOI
15

Kim, H. G.; Lee, H. B. R. Atomic layer deposition on 2D materials. Chem. Mater. 2017, 29, 3809–3826.
DOI Google Scholar
16

Park, T.; Kim, H.; Leem, M.; Ahn, W.; Choi, S.; Kim, J.; Uh, J.; Kwon, K.; Jeong, S. J.; Park, S. et al. Atomic layer deposition of Al2O3 on MoS2, WS2, WSe2, and h-BN: Surface coverage and adsorption energy. RSC Adv. 2017, 7, 884–889.
DOI Google Scholar
17

Johnson, R. W.; Hultqvist, A.; Bent, S. F. A brief review of atomic layer deposition: From fundamentals to applications. Mater. Today 2014, 17, 236–246.
DOI Google Scholar
18

Li, T. R.; Tu, T.; Sun, Y. W.; Fu, H. X.; Yu, J.; Xing, L.; Wang, Z. A.; Wang, H. M.; Jia, R. D.; Wu, J. X. et al. A native oxide high-κ gate dielectric for two-dimensional electronics. Nat. Electron. 2020, 3, 473–478.
DOI Google Scholar
19

Giannazzo, F. Engineering 2D heterojunctions with dielectrics. Nat. Electron. 2019, 2, 54–55.
DOI Google Scholar
20

Jing, X.; Illarionov, Y.; Yalon, E.; Zhou, P.; Grasser, T.; Shi, Y. Y.; Lanza, M. Engineering field effect transistors with 2D semiconducting channels: Status and prospects. Adv. Funct. Mater. 2020, 30, 1901971.
DOI Google Scholar
21

Li, N.; Wei, Z.; Zhao, J.; Wang, Q. Q.; Shen, C.; Wang, S. P.; Tang, J.; Yang, R.; Shi, D. X.; Zhang, G. Y. Atomic layer deposition of Al2O3 directly on 2D materials for high-performance electronics. Adv. Mater. Interfaces 2019, 6, 1802055.
DOI Google Scholar
22

Xiao, M. M.; Qiu, C. G.; Zhang, Z. Y.; Peng, L. M. Atomic-layer- deposition growth of an ultrathin HfO2 film on graphene. ACS Appl. Mater. Interfaces 2017, 9, 34050–34056.
DOI Google Scholar
23

Illarionov, Y. Y.; Banshchikov, A. G.; Polyushkin, D. K.; Wachter, S.; Knobloch, T.; Thesberg, M.; Mennel, L.; Paur, M.; Stöger-Pollach, M.; Steiger-Thirsfeld, A. et al. Ultrathin calcium fluoride insulators for two-dimensional field-effect transistors. Nat. Electron. 2019, 2, 230–235.
DOI Google Scholar
24

Illarionov, Y. Y.; Knobloch, T.; Jech, M.; Lanza, M.; Akinwande, D.; Vexler, M. I.; Mueller, T.; Lemme, M. C.; Fiori, G.; Schwierz, F. et al. Insulators for 2D nanoelectronics: The gap to bridge. Nat. Commun. 2020, 11, 3385.
DOI Google Scholar
25

Fisichella, G.; Schiliro, E.; Franco, S. D.; Fiorenza, P.; Lo Nigro, R.; Roccaforte, F.; Ravesi, S.; Giannazzo, F. Interface electrical properties of Al2O3 thin films on graphene obtained by atomic layer deposition with an in situ seedlike layer. ACS Appl. Mater. Interfaces 2017, 9, 7761–7771.
DOI Google Scholar
26

Park, Y. H.; Kim, M. H.; Kim, S. B.; Jung, H. J.; Chae, K.; Ahn, Y. H.; Park, J. Y.; Rotermund, F.; Lee, S. W. Enhanced nucleation of high-k dielectrics on graphene by atomic layer deposition. Chem. Mater. 2016, 28, 7268–7275.
DOI Google Scholar
27

Acharya, J.; Goul, R.; Romine, D.; Sakidja, R.; Wu, J. Effect of Al2O3 seed-layer on the dielectric and electrical properties of ultrathin MgO films fabricated using in situ atomic layer deposition. ACS Appl. Mater. Interfaces 2019, 11, 30368–30375.
DOI Google Scholar
28

Zhu, H.; Qin, X. Y.; Cheng, L. X.; Azcatl, A.; Kim, J.; Wallace, R. M. Remote plasma oxidation and atomic layer etching of MoS2. ACS Appl. Mater. Interfaces 2016, 8, 19119–19126.
DOI Google Scholar
29

Azcatl, A.; Mcdonnell, S.; Santosh, K. C.; Peng, X.; Dong, H.; Qin, X. Y.; Addou, R.; Mordi, G. I.; Lu, N.; Kim, J. et al. MoS2 functionalization for ultra-thin atomic layer deposited dielectrics. Appl. Phys. Lett. 2014, 104, 111601.
DOI Google Scholar
30

Wang, J. L.; Li, S. L.; Zou, X. M.; Ho, J.; Liao, L.; Xiao, X. H.; Jiang, C. Z.; Hu, W. D.; Wang, J. L.; Li, J. C. Integration of high-k oxide on MoS2 by using ozone pretreatment for high-performance MoS2 top-gated transistor with thickness-dependent carrier scattering investigation. Small 2015, 11, 5932–5938.
DOI Google Scholar
31

Park, S.; Kim, S. Y.; Choi, Y.; Kim, M.; Shin, H.; Kim, J.; Choi, W. Interface properties of atomic-layer-deposited Al2O3 thin films on ultraviolet/ozone-treated multilayer MoS2 Crystals. ACS Appl. Mater. Interfaces 2016, 8, 11189–11193.
DOI Google Scholar
32

Park, J. H.; Fathipour, S.; Kwak, I.; Sardashti, K.; Ahles, C. F.; Wolf, S. F.; Edmonds, M.; Vishwanath, S.; Xing, H. G.; Fullerton-Shirey, S. K. et al. Atomic layer deposition of Al2O3 on WSe2 functionalized by titanyl phthalocyanine. ACS Nano 2016, 10, 6888–6896.
DOI Google Scholar
33

Li, W. S.; Zhou, J.; Cai, S. H.; Yu, Z. H.; Zhang, J. L.; Fang, N.; Li, T. T.; Wu, Y.; Chen, T. S.; Xie, X. Y. et al. Uniform and ultrathin high-κ gate dielectrics for two-dimensional electronic devices. Nat. Electron. 2019, 2, 563–571.
DOI Google Scholar
34

Kim, D.; Choi, J. Y.; Ryu, S. W.; Kim, W. B. Improved interface and electrical properties by inserting an ultrathin SiO2 buffer layer in the Al2O3/Si heterojunction. Adv. Funct. Mater. 2019, 29, 1807271.
DOI Google Scholar
35

Yang, W.; Sun, Q. Q.; Geng, Y.; Chen, L.; Zhou, P.; Ding, S. J.; Zhang, D. W. The integration of Sub-10 nm gate oxide on MoS2 with ultra low leakage and enhanced mobility. Sci. Rep. 2015, 5, 11921.
DOI Google Scholar
36

Park, J. W.; Kwon, S.; Kwon, J. H.; Kim, C. Y.; Choi, K. C. Low- leakage fiber-based field-effect transistors with an Al2O3-MgO nanolaminate as gate insulator. ACS Appl. Electron. Mater. 2019, 1, 1400–1407.
DOI Google Scholar
37

Liu, Y.; Guo, J.; Zhu, E. B.; Liao, L.; Lee, S. J.; Ding, M. N.; Shakir, I.; Gambin, V.; Huang, Y.; Duan, X. F. Approaching the Schottky-Mott limit in van der Waals metal-semiconductor junctions. Nature 2018, 557, 696–700.
DOI Google Scholar
38

Kong, L. A.; Zhang, X. D.; Tao, Q. Y.; Zhang, M. L.; Dang, W. Q.; Li, Z. W.; Feng, L. P.; Liao, L.; Duan, X. F.; Liu, Y. Doping-free complementary WSe2 circuit via van der Waals metal integration. Nat. Commun. 2020, 11, 1866.
DOI Google Scholar
39

Wang, Y. L.; Wan, Z.; Qian, Q.; Liu, Y.; Kang, Z.; Fan, Z.; Wang, P. Q.; Wang, Y. K.; Li, C.; Jia, C. C. et al. Probing photoelectrical transport in lead halide perovskites with van der Waals contacts. Nat. Nanotechnol. 2020, 15, 768–775.
DOI Google Scholar
40

Chandrasekar, H.; Ahadi, K.; Razzak, T.; Stemmer, S.; Rajan, S. High current density SmTiO3/SrTiO3 field-effect transistors. ACS Appl. Electron. Mater. 2020, 2, 510–516.
DOI Google Scholar
41

Jiang, B.; Yang, Z. Y.; Liu, X. Q.; Liu, Y.; Liao, L. Interface engineering for two-dimensional semiconductor transistors. Nano Today 2019, 25, 122–134.
DOI Google Scholar
42

Liao, L.; Bai, J. W.; Cheng, R.; Lin, Y. C.; Jiang, S.; Huang, Y.; Duan, X. F. Top-gated graphene nanoribbon transistors with ultrathin high-k dielectrics. Nano Lett. 2010, 10, 1917–1921.
DOI Google Scholar
43

Smithe, K. K. H.; English, C. D.; Suryavanshi, S. V.; Pop, E. High- field transport and velocity saturation in synthetic monolayer MoS2. Nano Lett. 2018, 18, 4516–4522.
DOI Google Scholar
44

Tu, T.; Zhang, Y. C.; Li, T. R.; Yu, J.; Liu, L. M.; Wu, J. X.; Tan, C. W.; Tang, J. L.; Laing, Y.; Zhang, C. C. et al. Uniform high-k amorphous native oxide synthesized by oxygen plasma for top-gated transistors. Nano Lett. 2020, 20, 7469–7475.
DOI Google Scholar
45

Liu, Y.; Wang, P. Q.; Wang, Y. L.; Huang, Y.; Duan, X. F. Suppressed threshold voltage roll-off and ambipolar transport in multilayer transition metal dichalcogenide feed-back gate transistors. Nano Res. 2020, 13, 1943–1947.
DOI Google Scholar
File
12274_2021_3708_MOESM1_ESM.pdf (3.5 MB)
Publication history
Copyright
Acknowledgements

Publication history

Received: 02 April 2021
Revised: 09 June 2021
Accepted: 22 June 2021
Published: 05 August 2021
Issue date: February 2022

Copyright

© Tsinghua University Press and Springer-Verlag GmbH Germany, part of Springer Nature 2021

Acknowledgements

Acknowledgements

Y. L. acknowledges the financial support from the National Key R & D Program of China (No. 2018YFA0703700) and the National Natural Science Foundation of China (Nos. 51802090, 61874041, 51991340, and 51991341). X. D. acknowledges the support from the National Natural Science Foundation of China (No. 51991343). W. D. thanks Gonglei Shao and Hang Liu for AFM measurement, Liqiang Zhang and Xiaohua Shen for modifying the format of the paper, and Weisheng Li, Guanhua Yang, Yang Liu and Zhong Wan for the technique support of dual-gate measurement.

Return