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In this study, we propose complementary metal-oxide-semiconductor (CMOS) NOR logic gates consisting of silicon nanowire (NW) arrays on bendable substrates. A circuit consisting of two p-channel NW field-effect transistors (NWFETs) in series and two n-channel NWFETs in parallel is constructed to operate a two-input CMOS NOR logic gate. The NOR logic gates operate at a low supply voltage of 1 V with a rail-to-rail logic swing and a high voltage gain of approximately?3.0. The exact NOR logic functionality is achieved owing to the superior electrical characteristics of the well-aligned p- and n-NWFETs, which are obtained using conventional Si-based CMOS technology. Moreover, the NOR logic gates exhibit stable characteristics and have good mechanical properties. The proposed bendable NW CMOS NOR logic gates are promising building blocks for future bendable integrated electronics.
This work was partly supported by the National Research Foundation of Korea (NRF) Grant funded by the Korean Government (MSIP) (Nos. NRF-2013R1A2A1A03070750 and NRF-2015R1A2A1A15055437), the Brain Korea 21 Plus Project in 2017, and Samsung Electronics.