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Research Article | Open Access

Noncyclic BCH and Srivastava codes over Eisenstein integers toward next-generation error-correcting codes

NUTECH School of Applied Science and Humanities, National University of Technology, Islamabad, 44000, Pakistan
Department of Electrical Engineering, College of Engineering, Qassim University, Buraydah, Saudi Arabia
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Abstract

This article investigates noncyclic BCH and Srivastava codes over Eisenstein integer fields Z p [ ω ], where p 2 ( mod 3 ). By leveraging the algebraic structure of Eisenstein fields, we construct parity-check matrices with an alternant structure such that all maximal-order determinants satisfy the required algebraic conditions. These constructions provide explicit lower bounds on the minimum distance and enhance the error-correcting performance of the codes. The study further generalizes noncyclic forms of BCH and Srivastava codes, enabling higher code rates and larger minimum distances than their cyclic counterparts. Numerical examples illustrate the feasibility and effectiveness of the proposed constructions for reliable data transmission.

CLC number: 11T71, 68P30, 94A24, 97G70

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AIMS Mathematics
Pages 353-365

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Cite this article:
Sajjad M, Alqwaifly NA. Noncyclic BCH and Srivastava codes over Eisenstein integers toward next-generation error-correcting codes. AIMS Mathematics, 2026, 11(1): 353-365. https://doi.org/10.3934/math.2026015

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Received: 08 August 2025
Revised: 22 November 2025
Accepted: 12 December 2025
Published: 05 January 2026
©2026 the Author(s), licensee AIMS Press.

This is an open access article distributed under the terms of the Creative Commons Attribution License (https://creativecommons.org/licenses/by/4.0)