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Tsinghua Science and Technology 2023, 28(6): 1041-1049 https://doi.org/10.26599/TST.2022.9010053
Open Access | Issue | Published: 28 July 2023

Data Fusion with Genetic Algorithm Based Lifetime Prediction for Dependable Multi-Processor System-on-Chips

Show Author's Information Yong Zhao1,  Longkun Guo2,  Xiaoyan Zhang3( )
NXP Semiconductor, Eindhoven 5656, the Netherlands
School of Math and Statistics, Fuzhou University, Fuzhou 350108, China
School of Mathematical Science and Institute of Mathematics, Nanjing Normal University, Nanjing 210023, China
Keywords:
data fusion, genetic algorithm, lifetime prediction, health monitor, multi-core System-on-Chips (SoCs), embedded instruments
Cite this article:
Zhao Y, Guo L, Zhang X. Data Fusion with Genetic Algorithm Based Lifetime Prediction for Dependable Multi-Processor System-on-Chips. Tsinghua Science and Technology, 2023, 28(6): 1041-1049. https://doi.org/10.26599/TST.2022.9010053
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Abstract Full text About this article

With the prevalence of big-data technology, intricate, nanoscale Multi-Processor System-on-Chips (MP-SoCs) have been used in various safety-critical applications. However, with no extra countermeasures taken, this widespread use of MP-SoCs can lead to an undesirable decrease in their dependability. This study presents a promising approach using a group of Embedded Instruments (EIs) inside a processor core for health monitoring. Multiple health monitoring datasets obtained from the employed EIs are sampled and collated via the implemented experiment and thereafter used for conducting its remaining useful lifetime prognostics. This enables MP-SoCs to undertake preventive self-repair, thus realizing a zero mean downtime system and ensuring improved dependability. In addition, a principal component analysis based algorithm is designed for realizing the EI data fusion. Subsequently, a genetic algorithm based degradation optimization is employed to create a lifetime prediction model with respect to the processor.


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About this article

Data Fusion with Genetic Algorithm Based Lifetime Prediction for Dependable Multi-Processor System-on-Chips

Show Author's information Yong Zhao1, Longkun Guo2, Xiaoyan Zhang3( )
NXP Semiconductor, Eindhoven 5656, the Netherlands
School of Math and Statistics, Fuzhou University, Fuzhou 350108, China
School of Mathematical Science and Institute of Mathematics, Nanjing Normal University, Nanjing 210023, China

Abstract

With the prevalence of big-data technology, intricate, nanoscale Multi-Processor System-on-Chips (MP-SoCs) have been used in various safety-critical applications. However, with no extra countermeasures taken, this widespread use of MP-SoCs can lead to an undesirable decrease in their dependability. This study presents a promising approach using a group of Embedded Instruments (EIs) inside a processor core for health monitoring. Multiple health monitoring datasets obtained from the employed EIs are sampled and collated via the implemented experiment and thereafter used for conducting its remaining useful lifetime prognostics. This enables MP-SoCs to undertake preventive self-repair, thus realizing a zero mean downtime system and ensuring improved dependability. In addition, a principal component analysis based algorithm is designed for realizing the EI data fusion. Subsequently, a genetic algorithm based degradation optimization is employed to create a lifetime prediction model with respect to the processor.

Keywords: data fusion, genetic algorithm, lifetime prediction, health monitor, multi-core System-on-Chips (SoCs), embedded instruments

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Publication history

Received: 08 August 2022
Revised: 28 September 2022
Accepted: 08 November 2022
Published: 28 July 2023
Issue date: December 2023

Copyright

© The author(s) 2023.

Acknowledgements

This study was supported by the National Natural Science Foundation of China (Nos. 12271259, 12271098, and 11971349), EU project BASTION (No. 619871), and Horizon 2020 IMMORTAL (No. 644905). Recore Systems B. V. (the Netherlands) and Ridgetop Group Inc. (the Netherlands) are acknowledged for their contributions to IC design and measurement.

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