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The surge in data volume and algorithmic complexity necessitates the development of highly integrated, low-power, and high-performance electronic components. Conventional complementary metal-oxide-semiconductor (CMOS) inverters, which rely solely on isotropic two-dimensional materials, encounter limitations due to their single voltage output, thereby impeding the miniaturization of integrated circuits. In this study, we introduce anisotropic CMOS inverters based on n-ReS2 and p-WSe2, which demonstrate distinct voltage transfer characteristics across various crystalline orientations. These inverters exhibit the lowest voltage gain along the a-axis of ReS2 flakes, whereas they possess the highest voltage gain and the lowest static power consumption along the b-axis. By optimizing the gate dielectric on substrates, the inverter achieves an enhanced voltage gain of 30.8 and an ultra-low power consumption of 5.4 pW along the b-axis direction, when fabricated on a 35 nm Al2O3 substrate deposited via atomic layer deposition (ALD) method. Additionally, it captures a clear dynamic switching behavior at a supply voltage of 3 V under a 20 Hz square wave input signal. This study proposes a potential approach to circuit miniaturization by leveraging anisotropic two-dimensional materials for the integration of diverse voltage transfer characteristics within a single logic device, thereby achieving a combination of low power consumption and high-density integration.

This is an open access article under the terms of the Creative Commons Attribution 4.0 International License (CC BY 4.0, https://creativecommons.org/licenses/by/4.0/).
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