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Research Article | Open Access

Low-power consumption anisotropic CMOS inverters based on n-ReS2 and p-WSe2

Ting Fu1, Shuai Liu1, Baoxin Niu2, Wanfu Shen2, Chunguang Hu2, Ruixuan Peng3, Kai Liu3, Chengbao Jiang1, Shengxue Yang1( )
School of Materials Science and Engineering, Beihang University, Beijing 102206, China
State Key Laboratory of Precision Measuring Technology and Instruments, Tianjin University, Tianjin 300072, China
School of Materials Science and Engineering, Tsinghua University, Beijing 100084, China
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Graphical Abstract

We report anisotropic complementary metal-oxide-semiconductor (CMOS) inverters based on anisotropic n-ReS2 and isotropic p-WSe2. The inverters realize the integration of different voltage transfer characteristics within a single device, combining the benefits of low-power consumption with the potential for high-density integration.

Abstract

The surge in data volume and algorithmic complexity necessitates the development of highly integrated, low-power, and high-performance electronic components. Conventional complementary metal-oxide-semiconductor (CMOS) inverters, which rely solely on isotropic two-dimensional materials, encounter limitations due to their single voltage output, thereby impeding the miniaturization of integrated circuits. In this study, we introduce anisotropic CMOS inverters based on n-ReS2 and p-WSe2, which demonstrate distinct voltage transfer characteristics across various crystalline orientations. These inverters exhibit the lowest voltage gain along the a-axis of ReS2 flakes, whereas they possess the highest voltage gain and the lowest static power consumption along the b-axis. By optimizing the gate dielectric on substrates, the inverter achieves an enhanced voltage gain of 30.8 and an ultra-low power consumption of 5.4 pW along the b-axis direction, when fabricated on a 35 nm Al2O3 substrate deposited via atomic layer deposition (ALD) method. Additionally, it captures a clear dynamic switching behavior at a supply voltage of 3 V under a 20 Hz square wave input signal. This study proposes a potential approach to circuit miniaturization by leveraging anisotropic two-dimensional materials for the integration of diverse voltage transfer characteristics within a single logic device, thereby achieving a combination of low power consumption and high-density integration.

Keywords

anisotropic CMOS inverterstwo-dimensional materialsvoltage gainlow power consumption

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Nano Research
Volume 18 Issue 3,
March 2025
Article number: 94907231
DOI: 10.26599/NR.2025.94907231
Cite this article:
Fu T, Liu S, Niu B, et al. Low-power consumption anisotropic CMOS inverters based on n-ReS2 and p-WSe2. Nano Research, 2025, 18(3): 94907231. https://doi.org/10.26599/NR.2025.94907231

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Received: 06 December 2024
Revised: 23 December 2024
Accepted: 01 January 2025
Published: 05 March 2025
© The Author(s) 2025. Published by Tsinghua University Press.

This is an open access article under the terms of the Creative Commons Attribution 4.0 International License (CC BY 4.0, https://creativecommons.org/licenses/by/4.0/).
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