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Brain Science Advances 2020, 6(3): 242-254 https://doi.org/10.26599/BSA.2020.9050024
Review Article | Open Access | Issue | Published: 04 February 2021

An introduction and review on innovative silicon implementations of implantable/scalp EEG chips for data acquisition, seizure/behavior detection, and brain stimulation

Show Author's Information Weiwei Shi1,  Jinyong Zhang2( ),  Zhiguo Zhang3,4,  Lizhi Hu1,  Yongqian Su1
College of Information Engineering, Shenzhen University, Shenzhen 518000, Guangdong, China
College of Big Data and Internet, Shenzhen Technology University, Shenzhen 518118, Guangdong, China
School of Biomedical Engineering, Health Science Center, Shenzhen University, Shenzhen 518000, Guangdong, China
Peng Cheng Laboratory, Shenzhen 518055, Guangdong, China
Keywords:
biomedical chip, wearable EEG system, digital system chip, energy-efficient circuit, EEG signal acquisition
Cite this article:
Shi W, Zhang J, Zhang Z, et al. An introduction and review on innovative silicon implementations of implantable/scalp EEG chips for data acquisition, seizure/behavior detection, and brain stimulation. Brain Science Advances, 2020, 6(3): 242-254. https://doi.org/10.26599/BSA.2020.9050024
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Abstract Full text About this article

Technological advances in the semiconductor industry and the increasing demand and development of wearable medical systems have enabled the development of dedicated chips for complex electroencephalogram (EEG) signal processing with smart functions and artificial intelligence-based detections/classifications. Around 10 million transistors are integrated into a 1 mm2 silicon wafer surface in the dedicated chip, making wearable EEG systems a powerful dedicated processor instead of a wireless raw data transceiver. The reduction of amplifiers and analog-digital converters on the silicon surface makes it possible to place the analog front-end circuits within a tiny packaged chip; therefore, enabling high-count EEG acquisition channels. This article introduces and reviews the state-of-the-art dedicated chip designs for EEG processing, particularly for wearable systems. Furthermore, the analog circuits and digital platforms are included, and the technical details of circuit topology and logic architecture are presented in detail.


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About this article

An introduction and review on innovative silicon implementations of implantable/scalp EEG chips for data acquisition, seizure/behavior detection, and brain stimulation

Show Author's information Weiwei Shi1, Jinyong Zhang2( ), Zhiguo Zhang3,4, Lizhi Hu1, Yongqian Su1
College of Information Engineering, Shenzhen University, Shenzhen 518000, Guangdong, China
College of Big Data and Internet, Shenzhen Technology University, Shenzhen 518118, Guangdong, China
School of Biomedical Engineering, Health Science Center, Shenzhen University, Shenzhen 518000, Guangdong, China
Peng Cheng Laboratory, Shenzhen 518055, Guangdong, China

Abstract

Technological advances in the semiconductor industry and the increasing demand and development of wearable medical systems have enabled the development of dedicated chips for complex electroencephalogram (EEG) signal processing with smart functions and artificial intelligence-based detections/classifications. Around 10 million transistors are integrated into a 1 mm2 silicon wafer surface in the dedicated chip, making wearable EEG systems a powerful dedicated processor instead of a wireless raw data transceiver. The reduction of amplifiers and analog-digital converters on the silicon surface makes it possible to place the analog front-end circuits within a tiny packaged chip; therefore, enabling high-count EEG acquisition channels. This article introduces and reviews the state-of-the-art dedicated chip designs for EEG processing, particularly for wearable systems. Furthermore, the analog circuits and digital platforms are included, and the technical details of circuit topology and logic architecture are presented in detail.

Keywords: biomedical chip, wearable EEG system, digital system chip, energy-efficient circuit, EEG signal acquisition

References(21)

[1]
V Kartsch, G Tagliavini, M Guermandi, et al. BioWolf: a sub-10-mW 8-channel advanced brain- computer interface platform with a nine-core processor and BLE connectivity. IEEE Trans Biomed Circuits Syst. 2019, 13(5): 893-906.
Google Scholar
[2]
J van der Spiegel, ML Zhang, XL Liu. System-on-a-chip brain-machine-interface design - a review and perspective. In 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Hangzhou, China, 2016, pp 203-206.
[3]
BG Do Valle, SS Cash, CG Sodini. Low-power, 8-channel EEG recorder and seizure detector ASIC for a subdermal implantable system. IEEE Trans Biomed Circuits Syst. 2016, 10(6): 1058-1067.
Google Scholar
[4]
RR Harrison, PT Watkins, RJ Kier, et al. A low-power integrated circuit for a wireless 100-electrode neural recording system. IEEE J Solid-State Circuits. 2007, 42(1): 123-133
Google Scholar
[5]
XD Zou, XY Xu, LB Yao, et al. A 1-V 450-nW fully integrated programmable biomedical sensor interface chip. IEEE J Solid-State Circuits. 2009, 44(4): 1067-1077.
Google Scholar
[6]
N Verma, A Shoeb, J Bohorquez, et al. A micro-power EEG acquisition SoC with integrated feature extraction processor for a chronic seizure detection system. IEEE J Solid - State Circuits. 2010, 45(4): 804-816.
Google Scholar
[7]
Xu Jiawei, RF Yazicioglu, B Grundlehner, et al. A 160 μW 8-channel active electrode system for EEG monitoring. IEEE Trans Biomed Circuits Syst. 2011, 5(6): 555-567.
Google Scholar
[8]
K Abdelhalim, L Kokarovtseva, JL Perez Velazquez, et al. 915-MHz FSK/OOK wireless neural recording SoC with 64 mixed-signal FIR filters. IEEE J Solid - State Circuits. 2013, 48(10): 2478-2493.
Google Scholar
[9]
B Gosselin, M Sawan, CA Chapman. A low-power integrated bioamplifier with active low-frequency suppression. IEEE Trans Biomed Circuits Syst. 2007, 1(3): 184-192.
Google Scholar
[10]
R Muller, S Gambini, JM Rabaey. A 0.013 mm2, 5 μW, DC-coupled neural signal acquisition IC with 0.5 V supply. IEEE J Solid-St Circ. 47(1): 232-243.
Google Scholar
[11]
A Bagheri, MT Salam, JL Perez Velazquez, et al. Low-frequency noise and offset rejection in DC-coupled neural amplifiers: a review and digitally-assisted design tutorial. IEEE Trans Biomed Circuits Syst. 2017, 11(1): 161-176.
Google Scholar
[12]
Y Zhao, ZX Shang, Y Lian. A 2.55 NEF 76 dB CMRR DC-coupled fully differential difference amplifier based analog front end for wearable biomedical sensors. IEEE Trans Biomed Circuits Syst. 2019, 13(5): 918-926.
Google Scholar
[13]
RF Yazicioglu, P Merken, R Puers, et al. A 200 μW eight-channel EEG acquisition ASIC for ambulatory EEG systems. IEEE J Solid - State Circuits. 2008, 43(12): 3025-3038.
Google Scholar
[14]
C Kim, S Joshi, H Courellis, et al. Sub-μVrms-noise sub-μW/channel ADC-direct neural recording with 200-mV/ms transient recovery through predictive digital autoranging. IEEE J Solid - State Circuits. 2018, 53(11): 3101-3110.
Google Scholar
[15]
AH Shoeb. Application of machine learning to epileptic seizure onset detection and treatment. PhD Dissertation, Harvard University, Cambridge, MA, USA, 2009.
[16]
SA Huang, KC Chang, HH Liou, et al. A 1.9-mW SVM processor with on-chip active learning for epileptic seizure control. IEEE J Solid - State Circuits. 2020, 55(2): 452-464.
Google Scholar
[17]
SA Imtiaz, Z Jiang, E Rodriguez-Villegas. An ultralow power system on chip for automatic sleep staging. IEEE J Solid - State Circuits. 2017, 52(3): 822-833.
Google Scholar
[18]
WC Fang, KY Wang, N Fahier, et al. Development and validation of an EEG-based real-time emotion recognition system using edge AI computing platform with convolutional neural network system-on-chip design. IEEE J Emerg Sel Topics Circuits Syst. 2019, 9(4): 645-657.
Google Scholar
[19]
SA Huang, CH Yang. A hardware-efficient ADMM-based SVM training algorithm for edge computing. 2019, arXiv:1907.09916.
[20]
WM Chen, H Chiueh, TJ Chen, et al. A fully integrated 8-channel closed-loop neural-prosthetic CMOS SoC for real-time epileptic seizure control. IEEE J Solid - State Circuits. 2014, 49(1): 232-247.
Google Scholar
[21]
MAB Altaf, C Zhang, J Yoo. A 16-channel patient-specific seizure onset and termination detection SoC with impedance-adaptive transcranial electrical Stimulator. IEEE J Solid - State Circuits. 2015, 50(11): 2728-2740.
Google Scholar
Publication history
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Publication history

Received: 29 July 2020
Revised: 11 August 2020
Accepted: 09 September 2020
Published: 04 February 2021
Issue date: September 2020

Copyright

© The authors 2020

Acknowledgements

This work was supported by the National Natural Science Foundation of China (Grant No. 61974095), the Natural Science Foundation of Guangdong Province, China (Grant No. 2018A030313169), the Foundation for Young Talents in Higher Education of Guangdong (Grant No. 2018KQNCX405), and the Natural Science Foundation of Top Talent of SZTU (Grant No. 2019010801004).

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