Driving circuit for suppressing threshold voltage drift in silicon carbide MOSFETs

Threshold voltage drift in silicon carbide metal-oxide-semiconductor field-effect transistors (MOSFETs) poses a significant challenge to device reliability in practical applications. This paper reviews the characteristics and existing theoretical models of threshold voltage drift in silicon carbide MOSFETs and proposes a novel gate driving method and circuit to mitigate this issue. The proposed circuit differentiates the device’s turn-off dynamic process from the post turn-off gate voltage by introducing an intermediate voltage level, thereby effectively suppressing threshold voltage drift while retaining the benefits of a negative gate turn-off voltage. An experimental platform was constructed to evaluate the proposed driving circuit. Experimental results indicate that, under the specified conditions, the new circuit reduces threshold voltage drift by 37% compared to conventional driving methods.