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Software Support for LIRAC Architecture

Peng LIDongsheng WANGHaixia WANG( )Meijuan LUChongmin LIWeimin ZHENG
Research Institute of Information Technology, National Laboratory for Information Science and Technology, Tsinghua University, Beijing 100084, China
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Abstract

Memory limitations are always a focus of computer architecture. The live range aware cache (LIRAC) offers a way to reduce memory access using live range information. In the LIRAC system, scratch data need not be written back if the data will no longer be used. Three kinds of software support developed for LIRAC architecture use compiler analyses, binary analyses, and trace analyses. Trace analysis results show that LIRAC can eliminate 29% of cache write-backs on average and up to 83% in the best case for the SPEC CPU 2000 benchmark. These software techniques can show the feasibility and potential benefit of the LIRAC architecture.

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Tsinghua Science and Technology
Pages 700-706

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Cite this article:
LI P, WANG D, WANG H, et al. Software Support for LIRAC Architecture. Tsinghua Science and Technology, 2007, 12(6): 700-706. https://doi.org/10.1016/S1007-0214(07)70178-5

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Received: 08 January 2007
Revised: 20 June 2007
Published: 01 December 2007
© Tsinghua University Press 2007