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There is a continuous demand to reduce the size of the devices that form a unit circuit, such as logic gates and memory, to reduce their footprint and increase device integration. In order to achieve a highly efficient circuit architecture, optimizations need to be made in terms of device processing. However, the time involved in the current reduction of device sizes according to Moore's Law has slowed down. Here, we propose a flexible transistor with ultra-thin IGZO (InGaZnO, indium-gallium-zinc-oxide) as the channel material, which not only scales down the footprints of multi-transistor logic gates but also combines the functions of the logic gates, memory, and sensors into a single cell. The transistor proposed here has an ultrathin semiconductor layer and can implement the typical functions of logic gates that conventionally have 2-6 transistors. Furthermore, it demonstrates the memory effect with a programming time as low as 5 ns. This design can also display various artificial synaptic behaviors. This new device design and structure can be adopted for the development of next-generation flexible electronics that require higher integration.

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Publication history

Received: 29 June 2020
Revised: 23 August 2020
Accepted: 24 August 2020
Published: 05 January 2021
Issue date: January 2021

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© Tsinghua University Press and Springer-Verlag GmbH Germany, part of Springer Nature

Acknowledgements

This work was supported by the National Natural Science Foundation of China (No. 61574147), Zhejiang Provincial Natural Science Foundation for Distinguished Young Scholar (No. LR17F040002), Ningbo Natural Science Foundation of China (No. 2018A610003), and Instrument Developing Project of the Chinese Academy of Sciences (No. YJKYYQ20180021). We would like to thank Editage (www.editage.com) for their English language and editing support.

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Reprints and Permission requests may be sought directly from editorial office.
Email: nanores@tup.tsinghua.edu.cn

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