Suppressed threshold voltage roll-off and ambipolar transport in multilayer transition metal dichalcogenide feed-back gate transistors

The layered semiconducting transition metal dichalcogenides (s-TMDs) have attracted considerable interest as the channel material for field-effect transistors (FETs). However, the multilayer s-TMD transistors usually exhibit considerable threshold voltage (V_th) shift and ambipolar behavior at high source-drain bias, which is undesirable for modern digital electronics. Here we report the design and fabrication of double feedback gate (FBG) transistors, i.e., source FBG (S-FBG) and drain FBG (D-FBG), to combat these challenges. The FBG transistors differ from normal transistors by including an extra feedback gate, which is directly connected to the source/drain electrodes by extending and overlapping the source/drain electrodes over the yttrium oxide dielectrics on s-TMDs. We show that the S-FBG transistors based on multilayer MoS₂ exhibit nearly negligible V_th roll-off at large source-drain bias, and the D-FBG multilayer WSe₂ transistors could be tailored into either n-type or p-type transport, depending on the polarity of the drain bias. The double FBG structure offers an effective strategy to tailor multilayer s-TMD transistors with suppressed V_th roll-off and ambipolar transport for high-performance and low-power logic applications.