Optimized stateful material implication logic for three-dimensional data manipulation

The monolithic three-dimensional integration of memory and logic circuits could dramatically improve the performance and energy efficiency of computing systems. Some conventional and emerging memories are suitable for vertical integration, including highly scalable metal-oxide resistive switching devices ("memristors"). However, the integration of logic circuits has proven to be much more challenging than expected. In this study, we demonstrated memory and logic functionality in a monolithic three-dimensional circuit by adapting the recently proposed memristor-based stateful material implication logic. By modifying the original circuit to increase its robustness to device imperfections, we experimentally showed, for the first time, a reliable multi-cycle multi-gate material implication logic operation and half-adder circuit within a threedimensional stack of monolithically integrated memristors. Direct data manipulation in three dimensions enables extremely compact and high-throughput logicin- memory computing and, remarkably, presents a viable solution for the Feynman Grand Challenge of implementing an 8-bit adder at the nanoscale.