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Direct integration of high-mobility Ⅲ–Ⅴ compound semiconductors with existing Si-based complementary metal-oxide-semiconductor (CMOS) processing platforms presents the main challenge to increasing the CMOS performance and the scaling trend. Silicon hetero-nanowires with integrated Ⅲ–Ⅴ segments are one of the most promising candidates for advanced nano-optoelectronics, as first demonstrated using molecular beam epitaxy techniques. Here we demonstrate a novel route for InAs/Si hybrid nanowire fabrication via millisecond range liquid-phase epitaxy regrowth using sequential ion beam implantation and flash-lamp annealing. We show that such highly mismatched systems can be monolithically integrated within a single nanowire. Optical and microstructural investigations confirm the high quality hetero-nanowire fabrication coupled with the formation of atomically sharp interfaces between Si and InAs segments. Such hybrid systems open new routes for future high-speed and multifunctional nanoelectronic devices on a single chip.
Direct integration of high-mobility Ⅲ–Ⅴ compound semiconductors with existing Si-based complementary metal-oxide-semiconductor (CMOS) processing platforms presents the main challenge to increasing the CMOS performance and the scaling trend. Silicon hetero-nanowires with integrated Ⅲ–Ⅴ segments are one of the most promising candidates for advanced nano-optoelectronics, as first demonstrated using molecular beam epitaxy techniques. Here we demonstrate a novel route for InAs/Si hybrid nanowire fabrication via millisecond range liquid-phase epitaxy regrowth using sequential ion beam implantation and flash-lamp annealing. We show that such highly mismatched systems can be monolithically integrated within a single nanowire. Optical and microstructural investigations confirm the high quality hetero-nanowire fabrication coupled with the formation of atomically sharp interfaces between Si and InAs segments. Such hybrid systems open new routes for future high-speed and multifunctional nanoelectronic devices on a single chip.
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This work was partially supported by the Helmholtz– Gemeinschaft Deutscher Forschungszentren (No. HGF-VH-NG-713) and by the Austrian Science Fund (FWF) Project (No. I724-N16). The cleanroom facilities are provided by the Center for Micro- and Nanostructures (ZMNS) Vienna. Technical support by USTEM TU Wien is gratefully acknowledged.