High resolution scanning gate microscopy measurements on InAs/GaSb nanowire Esaki diode devices

Gated transport measurements are the backbone of electrical characterization of nanoscale electronic devices. Scanning gate microscopy (SGM) is one such gating technique that adds crucial spatial information, accessing the localized properties of semiconductor devices. Nanowires represent a central device concept due to the potential to combine very different materials. However, SGM on semiconductor nanowires has been limited to a resolution in the 50–100 nm range. Here, we present a study by SGM of newly developed Ⅲ-Ⅴ semiconductor nanowire InAs/GaSb heterojunction Esaki tunnel diode devices under ultra-high vacuum. Sub-5 nm resolution is demonstrated at room temperature via use of quartz resonator atomic force microscopy sensors, with the capability to resolve InAs nanowire facets, the InAs/GaSb tunnel diode transition and nanoscale defects on the device. We demonstrate that such measurements can rapidly give important insight into the device properties via use of a simplified physical model, without the requirement for extensive calculation of the electrostatics of the system. Interestingly, by precise spatial correlation of the device electrical transport properties and surface structure we show the position and existence of a very abrupt (< 10 nm) electrical transition across the InAs/GaSb junction despite the change in material composition occurring only over 30–50 nm. The direct and simultaneous link between nanostructure composition and electrical properties helps set important limits for the precision in structural control needed to achieve desired device performance.