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What’s Missing in Agile Hardware Design? Verification!

Parallel Systems Architecture Laboratory, Institute of Computer and Communication Sciences, School of Computer and Communication Sciences, Ecole Polytechnique Fédérale de Lausanne, Lausanne, CH-1015, Switzerland

For Cover Article: Xu YN, Yu ZH, Wang KF et al. Functional verification for agile processor development: A case for workflow integration. JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY 38(4): 737−753 July 2023. DOI: 10.1007/s11390-023-3285-8.

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Journal of Computer Science and Technology
Pages 735-736
Cite this article:
Falsafi B. What’s Missing in Agile Hardware Design? Verification!. Journal of Computer Science and Technology, 2023, 38(4): 735-736. https://doi.org/10.1007/s11390-023-0005-3

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Published: 06 December 2023
© Institute of Computing Technology, Chinese Academy of Sciences 2023
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