@article{WEN2007, 
author = {Ke WEN and Yu HU and Xiaowei LI},
title = {Deterministic Circular Self Test Path},
year = {2007},
journal = {Tsinghua Science and Technology},
volume = {12},
number = {S1},
pages = {20-25},
keywords = {very large scale integration (VLSI) test, built-in-self-test (BIST), circular self test path, deterministic},
url = {https://www.sciopen.com/article/10.1016/S1007-0214(07)70078-0},
doi = {10.1016/S1007-0214(07)70078-0},
abstract = {Circular self test path (CSTP) is an attractive technique for testing digital integrated circuits(IC) in the nanometer era, because it can easily provide at-speed test with small test data volume and short test application time. However, CSTP cannot reliably attain high fault coverage because of difficulty of testing random-pattern-resistant faults. This paper presents a deterministic CSTP (DCSTP) structure that consists of a DCSTP chain and jumping logic, to attain high fault coverage with low area overhead. Experimental results on ISCAS’89 benchmarks show that 100% fault coverage can be obtained with low area overhead and CPU time, especially for large circuits.}
}