@article{Kang2025, 
author = {Shenglin Kang and Xuetong Zhao and Qi Wang and Jie Liang and Jing Guo and Xilin Wang and Guilai Yin and Lijun Yang and Ruijin Liao},
title = {Ultrahigh voltage-gradient ZnO-based varistor ceramics via hybrid cold sintering process/spark plasma sintering and post-annealing process},
year = {2025},
journal = {Journal of Advanced Ceramics},
volume = {14},
number = {5},
pages = {9221065},
keywords = {microstructure, spark plasma sintering (SPS), cold sintering process (CSP), ZnO-based varistor ceramics, voltage gradient},
url = {https://www.sciopen.com/article/10.26599/JAC.2025.9221065},
doi = {10.26599/JAC.2025.9221065},
abstract = {A high voltage gradient (Vg) of ZnO-based varistor ceramics is critical for realizing miniaturized and lightweight overvoltage protection devices. However, improving Vg of ZnO-based varistor ceramics through conventional high-temperature sintering process remains a significant challenge. Here, we present a strategy to fabricate ultrahigh voltage-gradient ZnO-based varistor ceramics by combining cold sintering process/spark plasma sintering (CSP–SPS) with post-annealing process. Employing CSP–SPS, the ZnO-based varistor ceramics were initially densified at 300 °C and subsequently annealed at a low temperature of 700–900 °C. CSP–SPS technique combined with a low annealing temperature enables the production of ZnO-based varistor ceramics with fine and homogeneous microstructures, while suppressing the volatilization of Bi-rich phases at grain boundaries. This approach achieves the ultrahigh Vg of ~1832.71 V/mm, high nonlinear coefficient (α) of ~106.69, and low leakage current density (JL) of less than 0.2 μA/cm2. This work shows that the integration of CSP–SPS and post-annealing provides a promising way to design ZnO-based varistor ceramics with ultrahigh Vg.}
}