@article{Wu2021, 
author = {Yu-Wei Wu and Qing-Gang Wang and Long Zheng and Xiao-Fei Liao and Hai Jin and Wen-Bin Jiang and Ran Zheng and Kan Hu},
title = {FDGLib: A Communication Library for Efficient Large-Scale Graph Processing in FPGA-Accelerated Data Centers},
year = {2021},
journal = {Journal of Computer Science and Technology},
volume = {36},
number = {5},
pages = {1051-1070},
keywords = {data center, accelerator, graph processing, distributed architecture, communication optimization},
url = {https://www.sciopen.com/article/10.1007/s11390-021-1242-y},
doi = {10.1007/s11390-021-1242-y},
abstract = {With the rapid growth of real-world graphs, the size of which can easily exceed the on-chip (board) storage capacity of an accelerator, processing large-scale graphs on a single Field Programmable Gate Array (FPGA) becomes difficult. The multi-FPGA acceleration is of great necessity and importance. Many cloud providers (e.g., Amazon, Microsoft, and Baidu) now expose FPGAs to users in their data centers, providing opportunities to accelerate large-scale graph processing. In this paper, we present a communication library, called FDGLib, which can easily scale out any existing single FPGA-based graph accelerator to a distributed version in a data center, with minimal hardware engineering efforts. FDGLib provides six APIs that can be easily used and integrated into any FPGA-based graph accelerator with only a few lines of code modifications. Considering the torus-based FPGA interconnection in data centers, FDGLib also improves communication efficiency using simple yet effective torus-friendly graph partition and placement schemes. We interface FDGLib into AccuGraph, a state-of-the-art graph accelerator. Our results on a 32-node Microsoft Catapult-like data center show that the distributed AccuGraph can be 2.32x and 4.77x faster than a state-of-the-art distributed FPGA-based graph accelerator ForeGraph and a distributed CPU-based graph system Gemini, with better scalability.}
}