AI Chat Paper
Note: Please note that the following content is generated by AMiner AI. SciOpen does not take any responsibility related to this content.
{{lang === 'zh_CN' ? '文章概述' : 'Summary'}}
{{lang === 'en_US' ? '中' : 'Eng'}}
Chat more with AI
Article Link
Collect
Submit Manuscript
Show Outline
Outline
Show full outline
Hide outline
Outline
Show full outline
Hide outline
Research Article

Wafer-level site-controlled growth of silicon nanowires by Cu pattern dewetting

Zhishan Yuan1,2,3Yunfei Chen1,2Zhonghua Ni1,2Yuelin Wang3Hong Yi1,2( )Tie Li3( )
School of Mechanical EngineeringSoutheast UniversityNanjing210018China
Jiangsu Key Laboratory for Design and Manufacture of Micro-Nano Biomedical InstrumentsSoutheast UniversityNanjing211189China
Science and Technology on Microsystem LaboratoryShanghai Institute of Microsystem and Information TechnologyChinese Academy of SciencesShanghai200050China
Show Author Information

Graphical Abstract

Abstract

An approach for the wafer-level synthesis of size- and site-controlled amorphous silicon nanowires (α-SiNWs) is presented in this paper. Microscale Cu pattern arrays are precisely defined on SiO2 films with the help of photolithography and wet etching. Due to dewetting, Cu atoms shrink to the center of patterns during the annealing process, and react with the SiO2 film to open a diffusion channel for Si atoms to the substrate. α-SiNWs finally grow at the center of Cu patterns, and can be tuned by varying critical factors such as Cu pattern volume, SiO2 thickness, and annealing time. This offers a simple way to synthesize and accurately position a SiNW array on a large area.

Electronic Supplementary Material

Download File(s)
12274_2015_771_MOESM1_ESM.pdf (2 MB)

References

1

He, R. R.; Yang, P. D. Giant piezoresistance effect in silicon nanowires. Nat. Nanotechnol. 2006, 1, 42-46.

2

Rurali, R. Colloquium: Structural, electronic, and transport properties of silicon nanowires. Rev. Mod. Phys. 2010, 82, 427-449.

3

Zhao, X. Y.; Wei, C. M.; Yang, L.; Chou, M. Y. Quantum confinement and electronic properties of silicon nanowires. Phys. Rev. Lett. 2004, 92, 236805.

4

Fasoli, A.; Milne, W. I. Overview and status of bottom-up silicon nanowire electronics. Mat. Sci. Semicon. Proc. 2012, 15, 601-614.

5

Wang, Y. L.; Wang, T. Y.; Da, P. M.; Xu, M.; Wu, H.; Zheng, G. F. Silicon nanowires for biosensing, energy storage, and conversion. Adv. Mater. 2013, 25, 5177-5195.

6

Peng, K. Q.; Lee, S. T. Silicon nanowires for photovoltaic solar energy conversion. Adv. Mater. 2011, 23, 198-215.

7

Schmidt, V.; Wittemann, J. V.; Senz, S.; Gösele, U. Silicon nanowires: A review on aspects of their growth and their electrical properties. Adv. Mater. 2009, 21, 2681-2702.

8

Kim, W.; Ng, J. K.; Kunitake, M. E.; Conklin, B. R.; Yang, P. D. Interfacing silicon nanowires with mammalian cells. J. Am. Chem. Soc. 2007, 129, 7228-7229.

9

Chockla, A. M.; Harris, J. T.; Akhavan, V. A.; Bogart, T. D.; Holmberg, V. C.; Steinhagen, C.; Mullins, C. B.; Stevenson, K. J.; Korgel, B. A. Silicon nanowire fabric as a lithium ion battery electrode material. J. Am. Chem. Soc. 2011, 133, 20914-20921.

10

Wang, D. W.; Sheriff, B. A.; McAlpine, M.; Heath, J. R. Development of ultra-high density silicon nanowire arrays for electronics applications. Nano. Res. 2008, 1, 9-21.

11

Park, I.; Li, Z. Y.; Pisano, A. P.; Williams, R. S. Top-down fabricated silicon nanowire sensors for real-time chemical detection. Nanotechnology 2010, 21, 015501.

12

Minamisawa, R. A.; Süess, M. J.; Spolenak, R.; Faist, J.; David, C.; Gobrecht, J.; Bourdelle, K. K.; Sigg, H. Top-down fabricated silicon nanowires under tensile elastic strain up to 4.5%. Nat. Commun. 2012, 3, 1096.

13

Morton, K. J.; Nieberg, G.; Bai, S. F.; Chou, S. Y. Wafer-scale patterning of sub-40 nm diameter and high aspect ratio (> 50: 1) silicon pillar arrays by nanoimprint and etching. Nanotechnology 2008, 19, 345301.

14

Schmid, H.; Björk, M. T.; Knoch, J.; Riel, H.; Riess, W.; Rice, P.; Topuria, T. Patterned epitaxial vapor-liquid-solid growth of silicon nanowires on Si(111) using silane. J. Appl. Phys. 2008, 103, 024304.

15
Gong, Y. B.; Gao, H. M.; Liu, X.; Liu, W. P.; Li, T.; Zhou, P.; Wang, Y. L. Silicon nanowire fabricated by MEMS technology and its application in biochemical detection. In 2009 4th IEEE International Conference on Nano/Micro Engineered and Molecular Systems, Shenzhen, China, 2009, pp 86-89.
16

Ma, F. J.; Rustagi, S. C.; Samudra, G. S.; Zhao, H.; Singh, N.; Lo, G. Q.; Kwong, D. L. Modeling of stress-retarded thermal oxidation of nonplanar silicon structures for realization of nanoscale devices. IEEE Electron Device Lett. 2010, 31, 719-721.

17

Yun, S. S.; Yoo, S. K.; Yang, S.; Lee, J. H. Volume-producible fabrication of a silicon nanowire via crystalline wet etching of (110) silicon. J. Micromech. Microeng. 2008, 18, 095017.

18

Yu, X.; Wang, Y. C.; Zhou, H.; Liu, Y. X.; Wang, Y.; Li, T.; Wang, Y. L. Top-down fabricated silicon-nanowire-based field-effect transistor device on a (111) silicon wafer. Small 2013, 9, 525-530.

19

Kokai, F.; Inoue, S.; Hidaka, H.; Uchiyama, K.; Takahashi, Y.; Koshio, A. Catalyst-free growth of amorphous silicon nanowires by laser ablation. Appl. Phys. A 2013, 112, 1-7.

20

Wang, N.; Tang, Y. H.; Zhang, Y. F.; Lee, C. S.; Bello, I.; Lee, S. T. Si nanowires grown from silicon oxide. Chem. Phys. Lett. 1999, 299, 237-242.

21

Behura, S. K.; Yang, Q. Q.; Hirose, A.; Jani, O.; Mukhopadhyay, I. Catalyst-free synthesis of silicon nanowires by oxidation and reduction process. J. Mater. Sci. 2014, 49, 3592-3597.

22

Xu, X. D.; Wang, Y. C.; Liu, Z. F.; Zhao, R. G. A new route to large-scale synthesis of silicon nanowires in ultrahigh vacuum. Adv. Funct. Mater. 2007, 17, 1729-1734.

23

Suzuki, H.; Araki, H.; Tosa, M.; Noda, T. Formation of silicon nanowires by CVD using gold catalysts at low temperatures. Mater. Trans. 2007, 48, 2202-2206.

24

Morral, A. F. I.; Arbiol, J.; Prades, J. D.; Cirera, A.; Morante, J. R. Synthesis of silicon nanowires with wurtzite crystalline structure by using standard chemical vapor deposition. Adv. Mater. 2007, 19, 1347-1351.

25

Park, W. I.; Zheng, G. F.; Jiang, X. C.; Tian, B. Z.; Lieber, C. M. Controlled synthesis of millimeter-long silicon nanowires with uniform electronic properties. Nano. Lett. 2008, 8, 3004-3009.

26

Wang, Y. F.; Lew, K. K.; Ho, T. T.; Pan, L.; Novak, S. W.; Dickey, E. C.; Redwing, J. M.; Mayer, T. S. Use of phosphine as an n-type dopant source for vapor-liquid-solid growth of silicon nanowires. Nano. Lett. 2005, 5, 2139-2143.

27

Shan, Y. H.; Kalkan, A. K.; Peng, C. Y.; Fonash, S. J. From Si source gas directly to positioned, electrically contacted Si nanowires: The self-assembling "grow-in-place" approach. Nano. Lett. 2004, 4, 2085-2089.

28

Shan, Y. H.; Fonash, S. J. Self-assembling silicon nanowires for device applications using the nanochannel-guided "grow-in-place" approach. ACS Nano 2008, 2, 429-434.

29

Pevzner, A.; Engel, Y.; Elnathan, R.; Tsukernik, A.; Barkay, Z.; Patolsky, F. Confinement-guided shaping of semiconductor nanowires and nanoribbons: "Writing with nanowires". Nano. Lett. 2012, 12, 7-12.

30

Zeng, H. J.; Li, T.; Bartenwerfer, M.; Fatikow, S.; Wang, Y. L. In situ SEM electromechanical characterization of nanowire using an electrostatic tensile device. J. Phys. D. -Appl. Phys. 2013, 46, 305501.

31

Saxena, R.; Frederick, M. J.; Ramanath, G.; Gill, W. N.; Plawsky, J. L. Kinetics of voiding and agglomeration of copper nanolayers on silica. Phys. Rev. B 2005, 72, 115425.

32

Benouattas, N.; Mosser, A.; Raiser, D.; Faerber, J.; Bouabellou, A. Behaviour of copper atoms in annealed Cu/SiOx/Si systems. Appl. Surf. Sci. 2000, 153, 79-84.

33

van den Oetelaar, L. C. A.; van den Oetelaar, R. J. A.; Partridge, A.; Flipse, C. F. J.; Brongersma, H. H. Reaction of nanometer-sized Cu particles with a SiO2 substrate. Appl. Phys. Lett. 1999, 74, 2954-2956.

34

Renard, V. T.; Jublot, M.; Gergaud, P.; Cherns, P.; Rouchon, D.; Chabli, A.; Jousseaume, V. Catalyst preparation for CMOS-compatible silicon nanowire synthesis. Nat. Nanotechnol. 2009, 4, 654-657.

35
Jousseaume, V.; Renard, V. T. Cu-based catalysts can make CMOS compatible Si nanowires: Toward reconfigurable interconnects. In 2010 International Interconnect Technology Conference (IITC), Burlingame, USA, 2010, pp 1-3.https://doi.org/10.1109/IITC.2010.5510748
36

Yao, Y.; Fan, S. Si nanowires synthesized with Cu catalyst. Mater. Lett. 2007, 61, 177-181.

37

Wen, C. Y.; Reuter, M. C.; Tersoff, J.; Stach, E. A.; Ross, F. M. Structure, growth kinetics, and ledge flow during vapor-solid-solid growth of copper-catalyzed silicon nanowires. Nano. Lett. 2010, 10, 514-519.

38

Arbiol, J.; Kalache, B.; Cabarrocas, P. R. I.; Morante, J. R.; Morral, A. F. I. Influence of Cu as a catalyst on the properties of silicon nanowires synthesized by the vapour-solid-solid mechanism. Nanotechnology 2007, 18, 305606.

39

Yan, H. F.; Xing, Y. J.; Hang, Q. L.; Yu, D. P.; Wang, Y. P.; Xu, J.; Xi, Z. H.; Feng, S. Q. Growth of amorphous silicon nanowires via a solid-liquid-solid mechanism. Chem. Phys. Let. t 2000, 323, 224-228.

40
BBI Solutions Home Page. http://www.bbisolutions.com/ (accessed Nov 17, 2014).
41

Kayes, B. M.; Filler, M. A.; Putnam, M. C.; Kelzenberg, M. D.; Lewis, N. S.; Atwater, H. A. Growth of vertically aligned Si wire arrays over large areas (> 1 cm2) with Au and Cu catalysts. Appl. Phys. Lett. 2007, 91, 103110.

Nano Research
Pages 2646-2653
Cite this article:
Yuan Z, Chen Y, Ni Z, et al. Wafer-level site-controlled growth of silicon nanowires by Cu pattern dewetting. Nano Research, 2015, 8(8): 2646-2653. https://doi.org/10.1007/s12274-015-0771-5

750

Views

3

Crossref

N/A

Web of Science

3

Scopus

0

CSCD

Altmetrics

Received: 17 November 2014
Revised: 20 March 2015
Accepted: 23 March 2015
Published: 29 August 2015
© Tsinghua University Press and Springer-Verlag Berlin Heidelberg 2015
Return